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| 型號(hào)： | DSRT-L050-011 |
| 廠商： | CONEXANT SYSTEMS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, XMA |
| 文件頁(yè)數(shù)： | 14/76頁(yè) |
| 文件大小： | 632K |
| 代理商： | DSRT-L050-011 |
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RipTide LP Audio/Comm System Product Description
1200
Conexant
21
Conexant Proprietary Information
AC Electrical Characteristics
PCI Interface Signals
The PCI interface timing for PCI interface signals (0) conforms to the PCI Local Bus Specification, Production Version,
Revision 2.1, June 1, 1995.
PnP Serial EEPROM Interface Signals
An external 1K bit (64 x 16) PnP serial EEPROM is required only if the product and manufacturers ID for Plug and Play is to
be modified to other than the Conexant registered IDs. Otherwise, the internal ROM can be used for PnP support to reduce
manufacturing cost. If the EEPROM is not used, specific discrete components must be depopulated (refer to the RipTide
reference design schematic).
The serial EEPROM interface meets the timing requirements of an Atmel AT93C46, Microchip Technology, Inc. 93LC46B, or
equivalent 1K bit (64 x 16) device. Note: If an Atmel AT93C46 is used, connect pin 6 of the AT93C46 to VCC to select x16
configuration.
The following summarizes timing information for serial EEPROM interface signals.
Symbol
Parameter
Min
Max
Units
tval
CLK to Signal Valid Delay
400
ns
tsu
Input Set-up Time to CLK
100
ns
th
Input Hold Time from CLK
100
ns
Codec AC-link Interface Signals
The AC-link timing is described in the AMC Hardware Interface Section.
JTAG Interface
When enabled, the JTAG interface uses the TCK input as its clock. All pins of the device have JTAG implemented. Please
refer to IEEE Std 1149.1 for timing.
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