17.0 I2C MODULE
參數(shù)資料
型號： DSPIC30F5015-30I/PT
廠商： Microchip Technology
文件頁數(shù)： 12/129頁
文件大?。?/td> 0K
描述： IC DSPIC MCU/DSP 66K 64TQFP
產(chǎn)品培訓(xùn)模塊： dsPIC30F Quadrature Encoder Interface
Serial Communications using dsPIC30F CAN
Serial Communications using dsPIC30F I2C
Serial Communications using dsPIC30F SPI
Serial Communications using dsPIC30F UART
dsPIC30F 12 bit ADC - Part 2
dsPIC30F Addressing Modes - Part 1
dsPIC30F Architecture - Part 1
dsPIC30F DSP Engine & ALU
dsPIC30F Interrupts
dsPIC30F Motor Control PWM
dsPIC Timers
Asynchronous Stimulus
dsPIC30F Addressing Modes - Part 2
dsPIC30F Architecture - Part 2
dsPIC30F 12-bit ADC Part 1
標(biāo)準(zhǔn)包裝： 160
系列： dsPIC™ 30F
核心處理器： dsPIC
芯體尺寸： 16-位
速度： 30 MIP
連通性： CAN，I²C，SPI，UART/USART
外圍設(shè)備： 高級欠壓探測/復(fù)位，電機控制 PWM，QEI，POR，PWM，WDT
輸入/輸出數(shù)： 52
程序存儲器容量： 66KB（22K x 24）
程序存儲器類型： 閃存
EEPROM 大小： 1K x 8
RAM 容量： 2K x 8
電壓 - 電源 (Vcc/Vdd)： 2.5 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 16x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 64-TQFP
包裝： 托盤
產(chǎn)品目錄頁面： 651 (CN2011-ZH PDF)
配用： XLT64PT5-ND - SOCKET TRAN ICE 64MQFP/TQFP
AC164319-ND - MODULE SKT MPLAB PM3 64TQFP
DV164005-ND - KIT ICD2 SIMPLE SUIT W/USB CABLE
其它名稱： DSPIC30F501530IPT
2008 Microchip Technology Inc.
DS70149D-page 109
dsPIC30F5015/5016
17.0 I2C MODULE
The Inter-Integrated Circuit (I2C) module provides
complete hardware support for both Slave and
Multi-Master modes of the I2C serial communication
standard, with a 16-bit interface.
This module offers the following key features:
I2C interface supporting both Master and Slave
operation.
I2C Slave mode supports 7 and 10-bit address.
I2C Master mode supports 7 and 10-bit address.
I2C port allows bidirectional transfers between
master and slaves.
Serial clock synchronization for I2C port can be
used as a handshake mechanism to suspend and
resume serial transfer (SCLREL control).
I2C supports Multi-Master operation; detects bus
collision and will arbitrate accordingly.
17.1
Operating Function Description
The hardware fully implements all the master and slave
functions of the I2C Standard and Fast mode
specifications, as well as 7 and 10-bit addressing.
Thus, the I2C module can operate either as a slave or
a master on an I2C bus.
17.1.1
VARIOUS I2C MODES
The following types of I2C operation are supported:
I2C Slave operation with 7-bit address
I2C Slave operation with 10-bit address
I2C Master operation with 7 or 10-bit address
See the I2C programmer’s model in Figure 17-1.
17.1.2
PIN CONFIGURATION IN I2C MODE
I2C has a 2-pin interface; pin SCL is clock and pin SDA
is data.
17.1.3
I2C REGISTERS
I2CCON and I2CSTAT are control and status registers,
respectively. The I2CCON register is readable and writ-
able. The lower 6 bits of I2CSTAT are read-only. The
remaining bits of the I2CSTAT are read/write.
I2CRSR is the Shift register used for shifting data,
whereas I2CRCV is the Buffer register to which data
bytes are written, or from which data bytes are read.
I2CRCV is the Receive buffer, as shown in Figure 16-1.
I2CTRN is the Transmit register to which bytes are
written during a transmit operation, as shown in
Figure 16-2.
The I2CADD register holds the slave address. A Status
bit, ADD10, indicates 10-bit Address mode. The
I2CBRG acts as the Baud Rate Generator (BRG)
reload value.
In receive operations, I2CRSR and I2CRCV together
form a double-buffered receiver. When I2CRSR receives
a complete byte, it is transferred to I2CRCV and an
interrupt pulse is generated. During transmission, the
I2CTRN is not double-buffered.
FIGURE 17-1:
PROGRAMMER’S MODEL
Note:
This data sheet summarizes features of
this group of dsPIC30F devices and is not
intended to be a complete reference
source. For more information on the CPU,
peripherals, register descriptions and
general device functionality, refer to the
“dsPIC30F Family Reference Manual”
(DS70046). For more information on the
device instruction set and programming,
refer to the “dsPIC30F/33F Programmer’s
Reference Manual” (DS70157).
Note:
Following a Restart condition in 10-bit
mode, the user only needs to match the
first 7-bit address.
bit 7
bit 0
I2CRCV (8 bits)
bit 7
bit 0
I2CTRN (8 bits)
bit 8
bit 0
I2CBRG (9 bits)
bit 15
bit 0
I2CCON (16 bits)
bit 15
bit 0
I2CSTAT (16 bits)
bit 9
bit 0
I2CADD (10 bits)
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