參數(shù)資料
型號: DSPIC30F5015-30I/PT
廠商: Microchip Technology
文件頁數(shù): 110/129頁
文件大小: 0K
描述: IC DSPIC MCU/DSP 66K 64TQFP
產(chǎn)品培訓(xùn)模塊: dsPIC30F Quadrature Encoder Interface
Serial Communications using dsPIC30F CAN
Serial Communications using dsPIC30F I2C
Serial Communications using dsPIC30F SPI
Serial Communications using dsPIC30F UART
dsPIC30F 12 bit ADC - Part 2
dsPIC30F Addressing Modes - Part 1
dsPIC30F Architecture - Part 1
dsPIC30F DSP Engine & ALU
dsPIC30F Interrupts
dsPIC30F Motor Control PWM
dsPIC Timers
Asynchronous Stimulus
dsPIC30F Addressing Modes - Part 2
dsPIC30F Architecture - Part 2
dsPIC30F 12-bit ADC Part 1
標準包裝: 160
系列: dsPIC™ 30F
核心處理器: dsPIC
芯體尺寸: 16-位
速度: 30 MIP
連通性: CAN,I²C,SPI,UART/USART
外圍設(shè)備: 高級欠壓探測/復(fù)位,電機控制 PWM,QEI,POR,PWM,WDT
輸入/輸出數(shù): 52
程序存儲器容量: 66KB(22K x 24)
程序存儲器類型: 閃存
EEPROM 大小: 1K x 8
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 2.5 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-TQFP
包裝: 托盤
產(chǎn)品目錄頁面: 651 (CN2011-ZH PDF)
配用: XLT64PT5-ND - SOCKET TRAN ICE 64MQFP/TQFP
AC164319-ND - MODULE SKT MPLAB PM3 64TQFP
DV164005-ND - KIT ICD2 SIMPLE SUIT W/USB CABLE
其它名稱: DSPIC30F501530IPT
2008 Microchip Technology Inc.
DS70149D-page 81
dsPIC30F5015/5016
12.0 INPUT CAPTURE MODULE
This section describes the input capture module and
associated operational modes. The features provided by
this module are useful in applications requiring
frequency (period) and pulse measurement. Figure 12-1
depicts a block diagram of the input capture module.
Input capture is useful for such modes as:
Frequency/Period/Pulse Measurements
Additional sources of External Interrupts
The key operational features of the input capture
module are:
Simple Capture Event mode
Timer2 and Timer3 mode selection
Interrupt on input capture event
These operating modes are determined by setting the
appropriate
bits
in
the
ICxCON
register
(where x = 1,2,...,N). The dsPIC30F5015/5016 device
has 8 capture channels.
12.1
Simple Capture Event Mode
The simple capture events in the dsPIC30F product
family are:
Capture every falling edge
Capture every rising edge
Capture every 4th rising edge
Capture every 16th rising edge
Capture every rising and falling edge
These simple Input Capture modes are configured by
setting the appropriate bits ICM<2:0> (ICxCON<2:0>).
12.1.1
CAPTURE PRESCALER
There are four input capture prescaler settings,
specified by bits ICM<2:0> (ICxCON<2:0>). Whenever
the capture channel is turned off, the prescaler counter
will be cleared. In addition, any Reset will clear the
prescaler counter.
FIGURE 12-1:
INPUT CAPTURE MODE BLOCK DIAGRAM
Note:
This data sheet summarizes features of
this group of dsPIC30F devices and is not
intended to be a complete reference
source. For more information on the CPU,
peripherals, register descriptions and
general device functionality, refer to the
“dsPIC30F Family Reference Manual
(DS70046). For more information on the
device instruction set and programming,
refer to the “dsPIC30F/33F Programmer’s
Reference Manual” (DS70157).
ICxBUF
Prescaler
ICx
ICM<2:0>
Mode Select
3
Note:
Where ‘x’ is shown, reference is made to the registers or bits associated to the respective input
capture channels 1 through N.
10
Set Flag
Pin
ICxIF
ICTMR
T2_CNT
T3_CNT
Edge
Detection
Logic
Clock
Synchronizer
1, 4, 16
From General Purpose Timer Module
16
FIFO
R/W
Logic
ICI<1:0>
ICBNE, ICOV
ICxCON
Interrupt
Logic
Set Flag
ICxIF
Data Bus
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