參數(shù)資料
型號(hào)： DSP56F827
廠商： 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述： 16-bit Hybrid Controller(16位混合控制器)
中文描述： 16位混合控制器（16位混合控制器）
文件頁數(shù)： 37/52頁
文件大小： 1175K
代理商： DSP56F827
Analog-to-Digital Converter (ADC) Timing
56F827 Technical Data
37
Figure 26. Equivalent Analog Input Circuit
1.
2.
3.
4.
Parasitic capacitance due to package, pin to pin, and pin to package base coupling. (1.8pf)
Parasitic capacitance due to the chip bond pad, ESD protection devices and signal routing. (2.04pf)
Equivalent resistance for the ESD isolation resistor and the channel select mux. (500 ohms)
Sampling capacitor at the sample and hold circuit. Capacitor 4 is normally disconnected from the input and is
only connected to it at sampling time. (1pf)
Gain Error (transfer gain)
4
E
GAIN
0.95
1.00
1.10
—
Offset Voltage
4
V
OFFSET
-60
+15
+40
mV
Total Harmonic Distortion
4
THD
57
66
—
dB
Effective Number of Bits
4
ENOB
9.3
10.5
—
bit
Spurious Free Dynamic Range
4
SFDR
58
70
—
dB
Signal-to-Noise plus Distortion
4
SINAD
56
64
—
dB
ADC quiescent current
I
ADC
—
10
—
mA
ADC quiescent current (power
down bit set high)
I
ADCPD
—
1
—
μ
A
V
REF
quiescent current
I
VREF
—
1
—
mA
V
REF
quiescent current (power
down bit set high)
I
VREFPD
—
1
—
μ
A
1.
V
DDA
-0.3V.
2.
Measured in 10-90% range.
3.
LSB = Least Significant Bit.
4.
Guaranteed by characterization.
5.
t
AIC
= 1/
f
ADIC
V
REF
must be equal to or less than V
DDA
and must be greater than 2.7V. For optimal ADC performance, set V
REF
to
Table 16. ADC Specifications and Timing
Operating Conditions:
V
SSIO
=V
SS
= V
SSA
= V
SSA_ADC
= 0V, V
DDA_ADC
= V
DDA
=V
DDIO
=3.0–3.6V, V
DD
= 2.25–2.75V, V
REFH
= 2.7V–V
DDA
,
T
A
= –40
°
to +85
°
C, C
L
≤
50pF, f
op
= 80MHz
Characteristic
Symbol
Min
Typ
Max
Unit
1
2
3
4
ADC analog input
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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DSP56F827/D 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:56F827 16-bit Hybrid Controller
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