參數(shù)資料
型號(hào): DSP56F827
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: 16-bit Hybrid Controller(16位混合控制器)
中文描述: 16位混合控制器(16位混合控制器)
文件頁數(shù): 33/52頁
文件大小: 1175K
代理商: DSP56F827
Serial Peripheral Interface (SPI) Timing
56F827 Technical Data
33
Figure 21. Recovery from Stop State Using IRQA Interrupt Service
3.9 Serial Peripheral Interface (SPI) Timing
Table 15. SPI Timing
1
Operating Conditions:
V
SSIO
=V
SS
= V
SSA
= 0V, V
DDA
=V
DDIO
=3.0–3.6V, V
DD
= 2.25–2.75V, T
A
= –40
°
to +85
°
C, C
L
50pF, f
op
= 80MHz
Characteristic
Symbol
Min
Max
Unit
See Figure
Cycle time
Master
Slave
t
C
50
25
ns
ns
Figures
22
,
23
,
24
,
25
Enable lead time
Master
Slave
t
ELD
25
ns
ns
Figure
25
Enable lag time
Master
Slave
t
ELG
100
ns
ns
Figure
25
Clock (SCLK) high time
Master
Slave
t
CH
24
12
ns
ns
Figures
22
,
23
,
24
,
25
Clock (SCLK) low time
Master
Slave
t
CL
24.1
12
ns
ns
Figures
22
,
23
,
24
,
25
Data set-up time required for inputs
Master
Slave
t
DS
20
0
ns
ns
Figures
22
,
23
,
24
,
25
Data hold time required for inputs
Master
Slave
t
DH
0
2
ns
ns
Figures
22
,
23
,
24
,
25
Access time (time to data active from high-impedance state)
Slave
t
A
4.8
15
ns
Figure
25
Disable time (hold time to high-impedance state)
Slave
t
D
3.7
15.2
ns
Figure
25
Instruction Fetch
IRQA
A0–A15
PS, DS,
RD, WR
First IRQA Interrupt
t
IRQ
t
II
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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