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參數(shù)資料
| 型號： | DSP56F827 |
| 廠商： | 飛思卡爾半導體(中國)有限公司 |
| 英文描述： | 16-bit Hybrid Controller(16位混合控制器) |
| 中文描述： | 16位混合控制器（16位混合控制器） |
| 文件頁數(shù)： | 20/52頁 |
| 文件大?。?/td> | 1175K |
| 代理商： | DSP56F827 |
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20
56F827 Technical Data
Output source current
I
OH
4
—
—
mA
Output sink current
I
OL
4
—
—
mA
PWM pin output source current
3
I
OHP
10
—
—
mA
PWM pin output sink current
4
I
OLP
16
—
—
mA
Input capacitance
C
IN
—
8
—
pF
Output capacitance
C
OUT
—
12
—
pF
V
DD
supply current
I
DDT5
Run
6
—
60
90
mA
Wait
7
—
35
50
mA
Stop
—
6
15
mA
Low Voltage Interrupt, V
DDIO
power supply
8
V
EIO
2.4
2.7
3.0
V
Low Voltage Interrupt, V
DD
power supply
9
V
EIC
2.0
2.2
2.4
V
Power-on Reset
10
V
POR
—
1.7
2.0
V
1.
2.
3.
4.
5.
6.
configured as inputs; measured with all modules enabled.
7.
Wait I
DD
measured using external square wave clock source (f
osc
= 4MHz) into XTAL; all inputs 0.2V from rail; no
DC loads; less than 50pF on all outputs. C
L
= 20pF on EXTAL; all ports configured as inputs; EXTAL capacitance linearly
affects wait I
DD
; measured with PLL enabled.
8.
This low-voltage interrupt monitors the V
DDIO
power supply. If V
DDIO
drops below V
EIO
, an interrupt is generated.
Functionality of the device is guaranteed under transient conditions when V
DDIO
>V
EIO
(between the minimum specified
V
DDIO
and the point when the V
EIO
interrupt is generated).
9.
This low-voltage interrupt monitors theV
DD
power supply. If V
DDIO
drops below V
EIC
, an interrupt is generated.
Functionality of the device is guaranteed under transient conditions when V
DD
>V
EIC
(between the minimum specified
V
DD
and the point when the V
EIC
interrupt is generated).
10. Power
–
on reset occurs whenever the V
DD
power supply drops below
V
POR
. While power is ramping up, this signal
remains active as long as V
DD
is below
V
POR
, no matter how long the ramp-up rate is.
Schmitt Trigger inputs are: EXTBOOT, IRQA, IRQB, RESET, TCS, TCK, TRST, TMS, TDI, and RXD1.
Analog inputs are: ANA[0:7], XTAL and EXTAL. Specification assumes ADC is not sampling.
PWM pin output source current measured with 50% duty cycle.
PWM pin output sink current measured with 50% duty cycle.
I
DDT
= I
DD
+ I
DDA
(Total supply current for V
DD
+ V
DDA
)
Run (operating) I
DD
measured using 4MHz clock source. All inputs 0.2V from rail; outputs unloaded. All ports
Table 7. DC Electrical Characteristics (Continued)
Operating Conditions:
V
SSIO
=V
SS
= V
SSA
= 0V, V
DDA
=V
DDIO
=3.0–3.6V, V
DD
= 2.25–2.75V, T
A
= –40
°
to +85
°
C, C
L
≤
50pF, f
op
= 80MHz
Characteristic
Symbol
Min
Typ
Max
Unit
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| DSP56F827/D | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:56F827 16-bit Hybrid Controller |
| DSP56F827E | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers |
| DSP56F827E/D | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:56F827 16-bit Hybrid Controller |
| DSP56F827EVM | 制造商:Freescale Semiconductor 功能描述:Microprocessor Support IC For Use With:5 |
| DSP56F827EVMUM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:56F827 Evaluation Module Hardware User＇s Manual |
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