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參數(shù)資料
| 型號： | DSP56F827 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | 16-bit Hybrid Controller(16位混合控制器) |
| 中文描述： | 16位混合控制器（16位混合控制器） |
| 文件頁數(shù)： | 3/52頁 |
| 文件大?。?/td> | 1175K |
| 代理商： | DSP56F827 |
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56F827 Description
56F827 Technical Data
3
One Synchronous Serial Interface with 6 pins (or 6 additional GPIO pins)
One 8-channel Programmable Chip Select
Sixteen dedicated and forty eight multiplexed GPIO pins (64 total)
Computer-Operating Properly (COP) Watchdog timer
Two external interrupt pins
External reset pin for hardware reset
JTAG/On-Chip Emulation (OnCE) for unobtrusive, processor speed-independent debugging
Software-programmable, Phase Locked Loop-based frequency synthesizer for the core clock
Fabricated in high-density CMOS with 5V-tolerant, TTL-compatible digital inputs
One Time of Day (TOD) Timer
1.1.4
Power Information
Dual power supply, 3.3V and 2.5V
Wait and Multiple Stop modes available
1.2 56F827 Description
The 56F827 is a member of the 56800 core-based family of hybrid controllers. It combines, on a single
chip, the processing power of a DSP and the functionality of a microcontroller with a flexible set of
peripherals to create an extremely cost-effective solution for general purpose applications. Because of its
low cost, configuration flexibility, and compact program code, the 56F827 is well-suited for many
applications. The 56F827 includes many peripherals that are especially useful for applications such as:
noise suppression, ID tag readers, sonic/subsonic detectors, security access devices, remote metering,
sonic alarms, and telephony.
The 56800 core is based on a Harvard-style architecture consisting of three execution units operating in
parallel, allowing as many as six operations per instruction cycle. The microprocessor-style programming
model and optimized instruction set allow straightforward generation of efficient, compact code for both
DSP and MCU applications. The instruction set is also highly efficient for C/C++ Compilers to enable rapid
development of optimized control applications.
The 56F827 supports program execution from either internal or external memories. Two data operands can
be accessed from the on-chip Data RAM per instruction cycle. The 56F827 also provides two external
dedicated interrupt lines, and up to 64 General Purpose Input/Output (GPIO) lines, depending on peripheral
configuration.
The 56F827 controller includes 64K words (16-bit) of Program Flash and 4K words of Data Flash (each
programmable through the JTAG port) with 1K words of Program RAM and 4K words of Data RAM. It
also supports program execution from external memory. The 56800 core is capable of accessing two data
operands from the on-chip Data RAM per instruction cycle.
This controller also provides a full set of standard programmable peripherals that include one 10-input, 12-
bit Analog-to-Digital Converters (ADC), one Synchronous Serial Interface (SSI), two Serial Peripheral
Interfaces (SPI), three Serial Communications Interfaces (SCI). (Note: The second SPI is multiplexed with
the second and third SCIs, giving the option to select a second SPI or two additional SCIs.) This hybrid
controller also provides one Programmable Chip Select (PCS), and one Quad Timer. The SCI, SSI, SPI,
Quad Timer A, and select address and data lines can be used as General Purpose Input/Outputs (GPIOs) if
those functions are not required.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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| DSP56F827/D | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:56F827 16-bit Hybrid Controller |
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| DSP56F827EVM | 制造商:Freescale Semiconductor 功能描述:Microprocessor Support IC For Use With:5 |
| DSP56F827EVMUM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:56F827 Evaluation Module Hardware User＇s Manual |
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