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參數(shù)資料
| 型號： | DSP56F827 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | 16-bit Hybrid Controller(16位混合控制器) |
| 中文描述： | 16位混合控制器（16位混合控制器） |
| 文件頁數(shù)： | 13/52頁 |
| 文件大小： | 1175K |
| 代理商： | DSP56F827 |
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Signals and Package Information
56F827 Technical Data
13
SRCK
(GPIOC2)
53
Input/Output
Input/Output
SSI Serial Receive Clock (SRCK)—
This bidirectional pin provides the
serial bit rate clock for the Receive section of the SSI. The clock signal
can be continuous or gated and can be used by both the transmitter
and receiver in synchronous mode.
Port C GPIO
—This is a General Purpose I/O (GPIO) pin with the
capability of being individually programmed as input or output.
After reset, the default state is GPIO input.
STD
(GPIOC3)
52
Output
Input/Output
SSI Transmit Data (STD)
—This output pin transmits serial data from
the SSI Transmitter Shift Register.
Port C GPIO
—This is a General Purpose I/O (GPIO) pin with the
capability of being individually programmed as input or output.
After reset, the default state is GPIO input.
STFS
(GPIOC4)
51
Input
Input/Output
SSI Serial Transmit Frame Sync (STFS)—
This bidirectional pin is
used by the Transmit section of the SSI as frame sync I/O or flag I/O.
The STFS can be used by both the transmitter and receiver in
synchronous mode. It is used to synchronize data transfer and can be
an input or output pin.
Port C GPIO
—This is a General Purpose I/O (GPIO) pin with the
capability of being individually programmed as input or output.
After reset, the default state is GPIO input.
STCK
(GPIOC5)
50
Input/ Output
Input/Output
SSI Serial Transmit Clock (STCK)
—This bidirectional pin provides the
serial bit rate clock for the transmit section of the SSI. The clock signal
can be continuous or gated. It can be used by both the transmitter and
receiver in synchronous mode.
Port C GPIO
—This is a General Purpose I/O (GPIO) pin with the
capability of being individually programmed as input or output.
After reset, the default state is GPIO input.
SCLK
(GPIOF4)
102
Input/Output
Input/Output
SPI Serial Clock
—In master mode, this pin serves as an output,
clocking slaved listeners. In slave mode, this pin serves as the data
clock input.
Port F GPIO
—This General Purpose I/O (GPIO) pin can be individually
programmed as input or output.
After reset, the default state is SCLK.
MOSI
(GPIOF5)
101
Input/Output
Input/Output
SPI Master Out/Slave In (MOSI)
—This serial data pin is an output from
a master device and an input to a slave device. The master device
places data on the MOSI line a half-cycle before the clock edge that the
slave device uses to latch the data.
Port F GPIO
—This General Purpose I/O (GPIO) pin can be individually
programmed as input or output.
Table 3. 56F827 Signal and Package Information for the 128 Pin LQFP (Continued)
Signal Name
Pin No.
Type
Description
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DSP56F827/D | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:56F827 16-bit Hybrid Controller |
| DSP56F827E | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers |
| DSP56F827E/D | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:56F827 16-bit Hybrid Controller |
| DSP56F827EVM | 制造商:Freescale Semiconductor 功能描述:Microprocessor Support IC For Use With:5 |
| DSP56F827EVMUM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:56F827 Evaluation Module Hardware User＇s Manual |
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