參數(shù)資料
型號(hào)： DS33Z11
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： 網(wǎng)絡(luò)接口
英文描述： Ethernet Mapper
中文描述： DATACOM, NETWORK INTERFACE SUPPORT CIRCUIT, PBGA169
封裝： 14 X 14 MM, 1 MM PITCH, CSBGA-169
文件頁數(shù)： 111/169頁
文件大小： 1049K
代理商： DS33Z11
DS33Z11 Ethernet Mapper
111 of 169
9.6 Ethernet Interface Registers
The Ethernet Interface registers are used to configure RMII/MII bus operation and establish the MAC parameters
as required by the user. The MAC Registers cannot be addressed directly from the Processor port. The registers
below are used to
perform indirect read or write operations to the MAC registers. The MAC Status Registers are
shown in
Table 9-7
. Accessing the MAC Registers is described in the Section
8.14
.
9.6.1 Ethernet Interface Register Bit Descriptions
Register Name:
Register Description:
Register Address:
Bit #
Name
Bits 0 – 7: MAC Read Address (MACRA0-7)
Low byte of the MAC address. Used only for read operations.
SU.MACRADL
MAC Read Address Low Register
140h
7
6
5
4
3
2
1
0
MACRA7
0
MACRA6
0
MACRA5
0
MACRA4
0
MACRA3
0
MACRA2
0
MACRA1
0
MACRA0
0
Register Name:
Register Description:
Register Address:
Bit #
Name
Bits 0 – 7: MAC Read Address (MACRA8-15)
High byte of the MAC address. Used only for read operations.
Register Name:
SU.MACRD0
Register Description:
MAC Read Data Byte 0
Register Address:
142h
Bit #
7
6
5
Name
MACRD7
MACRD6
MACRD5
MACRD4
0
0
0
SU.MACRADH
MAC Read Address High Register
141h
7
6
5
4
3
2
1
0
MACRA15 MACRA14 MACRA13 MACRA12 MACRA11 MACRA10 MACRA9
0
0
0
0
MACRA8
0
0
0
0
4
3
2
1
0
MACRD3
0
MACRD2
0
MACRD1
0
MACRD0
0
0
Bits 0 – 7: MAC Read Data 0 (MACRD0-7)
One of four bytes of data read from the MAC. Valid after a read
command has been issued and the SU.MACRWC.MCS bit is zero.
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