參數(shù)資料
型號： DS2196LN+
廠商： Maxim Integrated Products
文件頁數(shù)： 67/157頁
文件大?。?/td> 0K
描述： IC FRAMER DUAL T1 LIU 100-LQFP
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 90
控制器類型： T1 調(diào)幀器
接口： 并行/串行
電源電壓： 3.135 V ~ 3.465 V
電流 - 電源： 85mA
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 100-LQFP
供應(yīng)商設(shè)備封裝： 100-LQFP（14x14）
包裝： 托盤
DS2196
17 of 157
Signal Name:
JTCLK
Signal Description:
JTAG IEEE 1149.1 Test Serial Clock
Signal Type:
Input
This signal is used to shift data into JTDI on the rising edge and out of JTDO on the falling edge. If not used, this
pin should be pulled high.
Signal Name:
JTDI
Signal Description:
JTAG IEEE 1149.1 Test Serial Data Input
Signal Type:
Input
Test instructions and data are clocked into this signal on the rising edge of JTCLK. If not used, this pin should be
pulled high. This pin has an internal pull-up.
Signal Name:
JTDO
Signal Description:
JTAG IEEE 1149.1 Test Serial Data Output
Signal Type:
Output
Test instructions are clocked out of this signal on the falling edge of JTCLK. If not used, this pin should be left
open circuited.
Signal Name:
JTRST*
Signal Description:
JTAG IEEE 1149.1 Test Reset
Signal Type:
Input
This signal is used to synchronously reset the test access port controller. At power up, JTRST must be set low and
then high. This action will set the device into the boundary scan bypass mode allowing normal device operation.
If boundary scan is not used, this pin should be held low. This pin has an internal pull-up.
Signal Name:
JTMS
Signal Description:
JTAG IEEE 1149.1 Test Mode Select
Signal Type:
Input
This signal is sampled on the rising edge of JTCLK and is used to place the test port into the various defined IEEE
1149.1 states. If not used, this pin should be pulled high. This signal has an internal pull-up.
Line Interface Pins
Signal Name:
MCLK
Signal Description:
Master Clock Input
Signal Type:
Input
A 1.544 MHz (±50 ppm) clock source with TTL levels is applied at this pin. This clock is used internally for both
clock/data recovery and for jitter attenuation. This clock is also used to source AIS within the LIU.
Signal Name:
RTIP & RRING
Signal Description:
Receive Tip and Ring
Signal Type:
Input
Analog inputs for clock recovery circuitry. These pins connect via a 1:1 transformer to the T1 line. See Section 19
for details.
Signal Name:
TTIP & TRING
Signal Description:
Transmit Tip and Ring
Signal Type:
Output
Analog line driver outputs. These pins connect via a 1:2 step–up transformer to the T1 line. See Section 19 for
details.
Signal Name:
LFSYNC
Signal Description:
LIU Frame Sync
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參數(shù)描述
DS2196LN+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC T1 Dual Framer LIU RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS219T 功能描述:烙鐵 DESOLDERING HEAD RoHS:否 制造商:Weller 產(chǎn)品:Soldering Stations 類型:Digital, Iron, Stand, Cleaner 瓦特:50 W 最大溫度:+ 850 F 電纜類型:US Cord Included
DS21E352 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS21E352N 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS21E354 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
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