參數(shù)資料
型號: DS2196LN+
廠商: Maxim Integrated Products
文件頁數(shù): 154/157頁
文件大?。?/td> 0K
描述: IC FRAMER DUAL T1 LIU 100-LQFP
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 90
控制器類型: T1 調(diào)幀器
接口: 并行/串行
電源電壓: 3.135 V ~ 3.465 V
電流 - 電源: 85mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應商設備封裝: 100-LQFP(14x14)
包裝: 托盤
DS2196
96 of 157
16.
ERROR INSERTION FUNCTION
An Error insertion function is available in each formatter of the DS2196 and is used to create errors in the
payload portion of the T1 frame in the transmit path. See Figure 21-7 for location. Errors can be inserted
over the entire frame or the user may select which channels are to be corrupted. Errors are created by
inverting the last bit in the count sequence. For example if the error rate 1 in 16 is selected, the 16th bit is
inverted. F-bits are excluded from the count and are never corrupted. Error rate changes occur on frame
boundaries. Error insertion options include continuous and absolute number with both options supporting
selectable insertion rates.
Transmit error insertion setup guideline.
1.
Enter desired error rate in the ERC register. Refer to table 16-1 for available
rates. Note: If ER3:0 = 0, no errors will be generated even if the constant error
insertion feature is enabled.
2A.
For constant error insertion set CE = 1 (ERC.4).
or
2B.
For a defined number of errors:
- Set CE = 0 (ERC.4)
- Load NOE1 & NOE 2 with the number of errors to be inserted
- Toggle WNOE (ERC.7) from 0 to 1, to begin error insertion
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