參數(shù)資料
型號: DS2152L+
廠商: Maxim Integrated Products
文件頁數(shù): 68/97頁
文件大?。?/td> 0K
描述: IC TXRX T1 1CHIP ENHNCD 100-LQFP
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 90
功能: 單芯片收發(fā)器
接口: T1
電路數(shù): 1
電源電壓: 4.75 V ~ 5.25 V
電流 - 電源: 75mA
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應商設備封裝: 100-LQFP(14x14)
包裝: 管件
包括: DSX-1 和 CSU 線路補償發(fā)生器,HDLC 控制器,帶內(nèi)回路代碼發(fā)生器和檢測器
產(chǎn)品目錄頁面: 1429 (CN2011-ZH PDF)
DS2152
70 of 97
13 PROGRAMMABLE IN-BAND CODE GENERATION AND DETECTION
The DS2152 can generate and detect a repeating bit pattern that is from 1 to 8 bits in length. To transmit a
pattern, the user will load the pattern to be sent into the Transmit Code Definition (TCD) register and
select the proper length of the pattern by setting the TC0 and TC1 bits in the In-Band Code Control
(IBCC) register. Once this is accomplished, the pattern will be transmitted as long as the TLOOP control
bit (CCR3.1) is enabled. Normally (unless the transmit formatter is programmed to not insert the F-bit
position) the DS2152 will overwrite the repeating pattern once every 193 bits to allow the F-bit position
to be sent. See Figure 16-11 for more details. As an example, if the user wished to transmit the standard
“l(fā)oop up” code for Channel Service Units which is a repeating pattern of ...10000100001... then 80h
would be loaded into TDR and the length would set to 5 bits.
The DS2152 can detect two separate repeating patterns to allow for both a “l(fā)oop up” code and a “l(fā)oop
down” code to be detected. The user will program the codes to be detected in the Receive Up Code
Definition (RUPCD) register and the Receive Down Code Definition (RDNCD) register and the length of
each pattern will be selected via the IBCC register. The DS2152 will detect repeating pattern codes in
both framed and unframed circumstances with bit error rates as high as 10**-2. The code detector has a
nominal integration period of 48ms. Hence, after about 48 ms of receiving either code, the proper status
bit (LUP at SR1.7 and LDN at SR1.6) will be set to a 1. Normally codes are sent for a period of 5
seconds. It is recommend that the software poll the DS2152 every 100ms to 1000ms until 5 seconds has
elapsed to insure that the code is continuously present.
IBCC: IN-BAND CODE CONTROL REGISTER (Address = 12 Hex)
(MSB)
(LSB)
TC1
TC0
RUP2
RUP1
RUP0
RDN2
RDN1
RDN0
SYMBOL
POSITION
NAME AND DESCRIPTION
TC1
IBCC.7
Transmit Code Length Definition Bit 1. See Table 13-1.
TC0
IBCC.6
Transmit Code Length Definition Bit 0. See Table 13-1.
RUP2
IBCC.5
Receive Up Code Length Definition Bit 2. See Table 13-2.
RUP1
IBCC.4
Receive Up Code Length Definition Bit 1. See Table 13-2.
RUP0
IBCC.3
Receive Up Code Length Definition Bit 0. See Table 13-2.
RDN2
IBCC.2
Receive Down Code Length Definition Bit 2. See Table 13-2.
RDN1
IBCC.1
Receive Down Code Length Definition Bit 1. See Table 13-2.
RDN0
IBCC.0
Receive Down Code Length Definition Bit 0. See Table 13-2.
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