參數(shù)資料
型號(hào)： CYWUSB6934-48LFXC
廠(chǎng)商： CYPRESS SEMICONDUCTOR CORP
元件分類(lèi)： 通信及網(wǎng)絡(luò)
英文描述： Multiconductor Cable; Number of Conductors:2; Conductor Size AWG:18; No. Strands x Strand Size:7 x 26; Jacket Material:Polyvinylchloride (PVC); Leaded Process Compatible:Yes; Capacitance:30pF/ft; Conductor Material:Copper RoHS Compliant: Yes
中文描述： SPECIALTY TELECOM CIRCUIT, QCC48
封裝： 7 X 7 MM, LEAD FREE, MO-220, QFN-48
文件頁(yè)數(shù)： 19/30頁(yè)
文件大小： 305K
代理商： CYWUSB6934-48LFXC
CYWUSB6932
CYWUSB6934
Document 38-16007 Rev. *G
Page 19 of 30
Note:
7.
The RSSI will collect a single value each time the part is put into receive mode via Control register (Reg 0x03, bit 7=1). See
Section 4.7
for more details.
Addr: 0x21
REG_CHANNEL
Default: 0x00
7
6
5
4
3
2
1
0
Reserved
Channel
Figure 7-22. Channel
Bit
Name
Description
7
Reserved
This bit is reserved and should be written with zero.
The Channel register (Reg 0x21) is used to determine the Synthesizer frequency. A value of 2 corresponds to a communication
frequency of 2.402 GHz, while a value of 79 corresponds to a frequency of 2.479GHz. The channels are separated from each
other by 1 MHz intervals.
Limit application usage to channels 2-79 to adhere to FCC regulations. FCC regulations require that channels 0 and 1 and
any channel greater than 79 be avoided. Use of other channels may be restricted by other regulatory agencies. The application
MCU must ensure that this register is modified before transmitting data over the air for the first time.
6:0
Channel
Addr: 0x22
REG_RSSI
Default: 0x00
7
6
5
4
3
2
1
0
Reserved
Valid
RSSI
Figure 7-23. Receive Signal Strength Indicator (RSSI)
[7]
Bit
Name
Description
These bits are reserved. This register is read-only.
7:6
Reserved
5
Valid
The Valid bit indicates whether the RSSI value in bits [4:0] are valid. This register is Read Only.
1 = RSSI value is valid
0 = RSSI value is invalid
The Receive Strength Signal Indicator (RSSI) value indicates the strength of the received signal. This is a read only
value with the higher values indicating stronger received signals meaning more reliable transmissions.
4:0
RSSI
Addr: 0x23
REG_PA
Default: 0x00
7
6
5
4
3
2
1
0
Reserved
PA Bias
Figure 7-24. PA Bias
Bit
7:3
2:0
Name
Reserved
PA Bias
Description
These bits are reserved and should be written with zeroes.
The Power Amplifier Bias (PA Bias) bits are used to set the transmit power of the IC through increasing (values up to 7) or
decreasing (values down to 0) the gain of the on-chip Power Amplifier. The higher the register value the higher the transmit
power. By changing the PA Bias value signal strength management functions can be accomplished. For general purpose
communication a value of 7 is recommended.
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