參數(shù)資料
型號(hào): CYWUSB6934-48LFXC
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Multiconductor Cable; Number of Conductors:2; Conductor Size AWG:18; No. Strands x Strand Size:7 x 26; Jacket Material:Polyvinylchloride (PVC); Leaded Process Compatible:Yes; Capacitance:30pF/ft; Conductor Material:Copper RoHS Compliant: Yes
中文描述: SPECIALTY TELECOM CIRCUIT, QCC48
封裝: 7 X 7 MM, LEAD FREE, MO-220, QFN-48
文件頁(yè)數(shù): 14/30頁(yè)
文件大?。?/td> 305K
代理商: CYWUSB6934-48LFXC
CYWUSB6932
CYWUSB6934
Document 38-16007 Rev. *G
Page 14 of 30
Addr: 0x0D
REG_TX_INT_EN
Default: 0x00
7
6
5
4
3
2
1
0
Reserved
Underflow
Overflow
Done
Empty
Figure 7-12. Transmit SERDES Interrupt Enable
Bit
Name
Description
These bits are reserved and should be written with zeroes.
7:4
Reserved
3
Underflow
The Underflow bit is used to enable the interrupt associated with an underflow condition associated with the Transmit
SERDES Data register (Reg 0x0F)
1 = Underflow interrupt enabled.
0 = Underflow interrupt disabled.
An underflow condition occurs when attempting to transmit while the Transmit SERDES Data register (Reg 0x0F) does not
have any data.
The Overflow bit is used to enabled the interrupt associated with an overflow condition with the Transmit SERDES Data
register (0x0F).
1 = Overflow interrupt enabled.
0 = Overflow interrupt disabled.
An overflow condition occurs when attempting to write new data to
the Transmit SERDES Data register (Reg 0x0F) before
the preceding data has been transferred to the transmit shift register.
2
Overflow
1
Done
The Done bit is used to enable the interrupt that signals the end of the transmission of data.
1 = Done interrupt enabled.
0 = Done interrupt disabled.
The Done condition occurs when the Transmit SERDES Data register (Reg 0x0F) has transmitted all of its data and there
is no more data for it to transmit.
0
Empty
The Empty bit is used to enable the interrupt that signals when
the Transmit SERDES register (Reg 0x0F) is empty.
1 = Empty interrupt enabled.
0 = Empty interrupt disabled.
The Empty condition occurs when the Transmit SERDES Data register (Reg 0x0F) is loaded into the transmit buffer and
it's safe to load the next byte
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