參數(shù)資料
型號(hào)： CYWUSB6934-48LFXC
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類： 通信及網(wǎng)絡(luò)
英文描述： Multiconductor Cable; Number of Conductors:2; Conductor Size AWG:18; No. Strands x Strand Size:7 x 26; Jacket Material:Polyvinylchloride (PVC); Leaded Process Compatible:Yes; Capacitance:30pF/ft; Conductor Material:Copper RoHS Compliant: Yes
中文描述： SPECIALTY TELECOM CIRCUIT, QCC48
封裝： 7 X 7 MM, LEAD FREE, MO-220, QFN-48
文件頁(yè)數(shù)： 10/30頁(yè)
文件大?。?/td> 305K
代理商： CYWUSB6934-48LFXC
CYWUSB6932
CYWUSB6934
Document 38-16007 Rev. *G
Page 10 of 30
Addr: 0x06
REG_SERDES_CTL
Default: 0x03
7
6
5
4
3
2
1
0
Reserved
SERDES
Enable
EOF Length
Figure 7-5. SERDES Control
Bit
7:4
3
Name
Reserved
SERDES Enable
Description
These bits are reserved and should be written with zeroes.
The SERDES Enable bit is used to switch between bit-serial mode and SERDES mode.
1 = SERDES enabled.
0 = SERDES disabled, bit-serial mode enabled.
When the SERDES is enabled data can be written to and read from the IC one byte at a time, through the use of the
SERDES Data registers. The bit-serial mode requires bits to be written one bit at a time through the use of the
DIO/DIOVAL pins, refer to section 3.2. It is recommended that SERDES mode be used to avoid the need to manage
the timing required by the bit-serial mode.
The End of Frame Length bits are used to set the number of sequential bit times for an inter-frame gap without valid
data before an EOF event will be generated. When in receive mode and a valid bit has been received the EOF event
can then be identified by the number of bit times that expire without correlating any new data. The EOF event causes
data to be moved to the proper SERDES Data Register and can also be used to generate interrupts. If 0 is the EOF
length, an EOF condition will occur at the first invalid bit after a valid reception.
2:0
EOF Length
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