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參數(shù)資料
| 型號： | CY7C43666AV |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 3.3V 4K x36/x18x2 Tri Bus FIFO(3.3V 4K x36/x18x2 三路總線先進先出) |
| 中文描述： | 3.3 4K的x36/x18x2三總線的FIFO（3.3 4K的x36/x18x2三路總線先進先出） |
| 文件頁數(shù)： | 6/39頁 |
| 文件大?。?/td> | 573K |
| 代理商： | CY7C43666AV |
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CY7C43646AV
CY7C43666AV/CY7C43686AV
6
PRELIMINARY
Maximum Ratings
[1]
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature
.......................................
65
°
C to +150
°
C
Ambient Temperature with
Power Applied
....................................................
55
°
C to +125
°
C
Supply Voltage to Ground Potential
..................
0.5V to +7.0V
DC Voltage Applied to Outputs
in High Z State
[2]
..........................................
0.5V to V
CC
+0.5V
DC Input Voltage
[2]
........................................
0.5V to V
CC
+0.5V
Output Current into Outputs (LOW)............................. 20 mA
Static Discharge Voltage ...........................................>2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current..................................................... >200 mA
Notes:
1.
Stresses beyond those listed under
“
Absolute Maximum Ratings
”
may cause permanent damage to the device. These are stress ratings only and functional
operation of the device at these or any other conditions beyond those indicated under
“
recommended operating conditions
”
is not implied. Exposure to absolute-
maximum-rated conditions for extended periods may affect device reliability.
The input and output voltage ratings may be exceeded provided the input and output current ratings are observed.
Operating V
CC
Range for -7 speed is 3.3V ± 5%.
2.
3.
RENB
Port B Read
Enable
I
RENB must be HIGH to enable a LOW-to-HIGH transition of CLKB to read data on
Port B.
RT1
FIFO1
Retransmit
I
A LOW strobe on this pin will retransmit data on FIFO1 from the location of the write
pointer at the last Partial or Master reset.
RT2
FIFO2
Retransmit
I
A LOW strobe on this pin will retransmit data on FIFO2 from the location of the write
pointer at the last Partial or Master reset.
SIZEB
Bus Size Select
I
A HIGH on this pin when BM is HIGH selects byte bus (9-bit) size on Port B. A LOW
on this pin when BM is HIGH selects word (18-bit) bus size. SIZE works with BM and
BE to select the bus size and endian arrangement for Port B. The level of SIZE must
be static throughout device operation.
SIZEC
Bus Size Select
I
A HIGH on this pin when BM is HIGH selects byte bus (9-bit) size on Port B. A LOW
on this pin when BM is HIGH selects word (18-bit) bus size. SIZE works with BM and
BE to select the bus size and endian arrangement for Port B. The level of SIZE must
be static throughout device operation.
SPM
Serial
Programming
I
A LOW on this pin selects serial programming of partial flag offsets. A HIGH on this pin
selects parallel programming or default offsets (8, 16, or 64).
W/RA
Port A
Write/Read
Select
I
A HIGH selects a write operation and a LOW selects a read operation on Port A for a
LOW-to-HIGH transition of CLKA. The A
0
–
35
outputs are in the HIGH impedance state
when W/RA is HIGH.
WENC
Port C Write
Enable
I
WENC must be HIGH to enable a LOW-to-HIGH transition of CLKC to write data on
Port C.
Pin Definitions
(continued)
Signal Name
Description
I/O
Function
Operating Range
Range
Ambient
Temperature
0
°
C to +70
°
C
40
°
C to +85
°
C
V
CC
[3]
Commercial
3.3V ± 10%
Industrial
3.3V ± 10%
相關PDF資料 |
PDF描述 |
|---|---|
| CY7C43686AV | 3.3V 16K x36/x18x2 Tri Bus FIFO(3.3V 16K x36/x18x2 三路總線先進先出) |
| CY7C453 | 2Kx9 Cascadable Clocked FIFOs with Programmable Flags(帶可編程標記的2Kx9可級聯(lián)定時的先進先出) |
| CY7C451 | 512x9 Cascadable Clocked FIFOs with Programmable Flags(帶可編程標記的512x9可級聯(lián)定時的先進先出) |
| CY7C454 | 4Kx9 Cascadable Clocked FIFOs with Programmable Flags(帶可編程標記的4Kx9可級聯(lián)定時的先進先出) |
| CY7C466A | Asynchronous, Cascadable 64K x9 FIFOs(異步，可級聯(lián)的 64K x9 先進先出) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C43682-15AC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C43683-10AI | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C43683AV-15AC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 16K x 36 128-Pin TQFP 制造商:Rochester Electronics LLC 功能描述:3.3V SYNC FIFO W/BUS MATCHING 16K X36 (NOT IDT COMPAT) - Bulk |
| CY7C43684-10AC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C43684AV-10AC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Dual Depth/Width Bi-Dir 16K x 36 x 2 128-Pin TQFP 制造商:Rochester Electronics LLC 功能描述:3.3V BIDIR SYNC FIFO W/ BUS MATCHING 16KX32X2 - Bulk |
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