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參數(shù)資料
| 型號： | CY7C43666AV |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 3.3V 4K x36/x18x2 Tri Bus FIFO(3.3V 4K x36/x18x2 三路總線先進先出) |
| 中文描述： | 3.3 4K的x36/x18x2三總線的FIFO（3.3 4K的x36/x18x2三路總線先進先出） |
| 文件頁數(shù)： | 36/39頁 |
| 文件大小： | 573K |
| 代理商： | CY7C43666AV |
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CY7C43646AV
CY7C43666AV/CY7C43686AV
36
PRELIMINARY
Table 5. FIFO1 Flag Operation (CY Standard and FWFT modes)
Number of Words in FIFO Memory
[62,63,64,65]
Synchronized to CLKA
Synchronized to CLKB
CY7C43646AV
0
CY7C43666AV
0
CY7C43686AV
0
EFB/ORB
L
AEB
L
AFA
H
FFA/IRA
H
1 TO X1
1 TO X1
1 TO X1
H
L
H
H
(X1+1) to
[1024
–
(Y1+1)]
(X1+1) to
[4096
–
(Y1+1)]
(X1+1) to
[16384
–
(Y1+1)]
H
H
H
H
(1024
–
Y1) to 1023 (4096
–
Y1) to 4095
(16384
–
Y1) to
16383
H
H
L
H
1024
4096
16384
H
H
L
L
Table 6. FIFO2 Flag Operation (CY Standard and FWFT modes)
Number of Words in FIFO Memory
[63,64,66,67]
CY7C43646AV
CY7C43666AV
Synchronized to CLKA
EFB/ORB
Synchronized to CLKC
AFC
CY7C43686AV
AEB
FFC/IRC
0
0
0
L
L
H
H
1 TO X2
1 TO X2
1 TO X2
H
L
H
H
(X2+1) to
[1024
–
(Y2+1)]
(X2+1) to
[4096
–
(Y2+1)]
(X2+1) to
[16384
–
(Y2+1)]
H
H
H
H
(1024
–
Y2) to 1023
(4096
–
Y2) to 4095
(16384
–
Y2) to
16383
H
H
L
H
1024
4096
16384
H
H
L
L
Table 7. Data Size Table for Word Writes to FIFO2
Size Mode
[68]
SIZE
Write No.
Data Written to FIFO2
C
9
–
17
A
Data Read From FIFO2
A
18
–
26
B
BM
BE
C
0
–
8
B
A
27
–
35
A
A
9
–
17
C
A
0
–
8
D
H
L
H
1
2
C
D
H
L
L
1
C
D
A
B
C
D
2
A
B
Notes:
62. X1 is the almost-empty offset for FIFO1 used by AEB. Y1 is the almost-full offset for FIFO1 used by AFA. Both X1 and Y1 are selected during a FIFO1 reset
or port A programming.
63. When a word loaded to an empty FIFO is shifted to the output register, its previous FIFO memory location is free.
64. Data in the output register does not count as a
“
word in FIFO memory
”
. Since in FWFT Mode, the first word written to an empty FIFO goes unrequested to
the output register (no read operation necessary), it is not included in the FIFO memory count.
65. The ORB and IRA functions are active during FWFT mode; the EFB and FFA functions are active in CY Standard Mode.
66. X2 is the almost-empty offset for FIFO2 used by AEA. Y2 is the almost-full offset for FIFO2 used by AFC. Both X2 and Y2 are selected during a FIFO2 reset
or port A programming.
67. The ORA and IRC functions are active during FWFT mode; the EFA and FFC functions are active in CY Standard Mode.
68. BE is selected at Master Reset. SIZEC must be static throughout device operation.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C43682-15AC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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| CY7C43683AV-15AC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 16K x 36 128-Pin TQFP 制造商:Rochester Electronics LLC 功能描述:3.3V SYNC FIFO W/BUS MATCHING 16K X36 (NOT IDT COMPAT) - Bulk |
| CY7C43684-10AC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C43684AV-10AC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Dual Depth/Width Bi-Dir 16K x 36 x 2 128-Pin TQFP 制造商:Rochester Electronics LLC 功能描述:3.3V BIDIR SYNC FIFO W/ BUS MATCHING 16KX32X2 - Bulk |
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