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參數(shù)資料
| 型號： | CY4615 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | EZ-USB AT2⑩ USB 2.0 to ATA/ATAPI Bridge |
| 中文描述： | 的EZ - USB AT2⑩個USB 2.0到ATA / ATAPI的橋 |
| 文件頁數(shù)： | 14/26頁 |
| 文件大?。?/td> | 193K |
| 代理商： | CY4615 |
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CY7C68300
Document #: 38-08011 Rev. *B
Page 14 of 26
Table 5-6. EEPROM Organization
EEPROM
Address
Configuration
0x00
Field Name
Field Description
Required
Contents
Suggested
Contents
I
2
C-compatible memory
device signature (LSB)
I
2
C-compatible memory
device signature (MSB)
APM Value
LSB I
2
C-compatible memory device signature byte.
0x4D
0x01
MSB I
2
C-compatible memory device signature byte.
0x4D
0x02
ATA Device Automatic Power Management Value. If an
attached ATA device supports APM and this field contains
other than 0x00, the EZ-USB AT2 will issue a
SET_FEATURES command to Enable APM with this value
during the drive initialization process. Setting APM Value to
0x00 disables this functionality. This value is ignored with
ATAPI devices.
Time in 128-ms granularity before the EZ-USB AT2 stops
polling the ALT STAT register for reset complete and restarts
the reset process (0x80 = 16.4 seconds).
Value in the first byte of the CBW CB field that designates that
the CB is t o be decoded as vendor specific ATA commands
instead of the ATAPI command block. See section 4.0 for
more detail on how this byte is used.
Bits(7:4) Set to 0
Bit (3)
Enables a delay of up to 120 ms at each read of the DRQ bit
where the device data length does not match the host data
length. This allows the EZ-USB AT2 to work with most
devices that incorrectly clear the BUSY bit before a valid
status is present.
Bit (2)
Determines if a short packet is sent prior to the STALL of an
IN endpoint. The USB
Mass Storage Class Bulk-Only Speci-
fication
allows a device to send a short or zero-length IN
packet prior to returning a STALL handshake for certain
cases. Certain host controller drivers may require a short
packet prior to STALL.
1 = Force a short packet before STALL.
0 = Don
’
t force a short packet before STALL.
Bit (1)
Determines if the EZ-USB AT2 is to do a SRST reset during
drive initialization.
[3]
1 = Perform SRST during initialization.
0 = Don
’
t perform SRST during initialization.
Bit (0)
Skip ATA_NRESET assertion.
[4]
0 = Allow ARESET# assertion for all resets.
1 = Disable ARESET# assertion except for power-on reset
cycles.
0x00
0x03
ATA Initialization Timeout
0x80
0x04
ATA Command Designator
0x24
0x05
Reserved
BUSY Bit Delay
0x07
Short Packet Before Stall
SRST Enable
Skip Pin Reset
Notes:
3.
4.
At least one reset must be enabled. Do not set SRST to 0 and Skip Pin Reset to 1at the same time.
SRST Enable must be set in conjunction with Skip Pin Reset. Setting this bit causes the EZ-USB AT2 to bypass ARESET# during initialization. All reset events
except a power-on reset utilize SRST as the drive mechanism.
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參數(shù)描述 |
|---|---|
| CY4615A | 功能描述:開發(fā)板和工具包 - 其他處理器 Development Board COM RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓: |
| CY4615B | 功能描述:界面開發(fā)工具 Reference Design Kit COM RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
| CY4616 | 制造商:Cypress Semiconductor 功能描述:HIGH SPEED USB TO ATA - Bulk |
| CY4617 | 功能描述:開發(fā)板和工具包 - 其他處理器 Development Board COM RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓: |
| CY4617-CF | 制造商:Cypress Semiconductor 功能描述:USB LS DEVELOPMENT KIT - Bulk |
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