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參數(shù)資料
| 型號： | CY4615 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | EZ-USB AT2⑩ USB 2.0 to ATA/ATAPI Bridge |
| 中文描述： | 的EZ - USB AT2⑩個USB 2.0到ATA / ATAPI的橋 |
| 文件頁數(shù)： | 12/26頁 |
| 文件大小： | 193K |
| 代理商： | CY4615 |
CY7C68300
Document #: 38-08011 Rev. *B
Page 12 of 26
5.1.2
The mfg_load and mfg_read vendor-specific commands will be passed down through the bulk pipe in the CBWCB portion of the
CBW. The format of this MFGCB is shown below. Byte 0 is a vendor-specific command designator whose value is configurable
and set in the configuration data. Byte 1 must be 0x27 to identify MfgCB. Byte 2
–
15 are reserved and must be set to zero.
The data transfer length will be determined by the CBW Data Transfer Length specified in bytes 8 through 11 (dCBWDataTrans-
ferLength) of the CBW. The type/direction of the command is determined by the direction bit specified in byte 12, bit 7 (bmCBW-
Flags) of the CBW.
Table 5-3. Example MfgCB
MfgCB
5.1.2.1
During a mfg_load, the EZ-USB AT2 goes into Manufacturing Test Mode. Manufacturing Test Mode is provided as a means to
implement board or system level interconnect tests. During Manufacturing Test Mode operation, all outputs not directly associated
with USB operation are controllable. Normal control of the output pins are disabled. Control of the select EZ-USB AT2 IO pins
and their three-state controls are mapped to the ATAPI data packet associated with this request. (See the following table for
explanation of the required mfg_load data format.) This requires a write of seven bytes. To exit Manufacturing Test Mode, a hard
reset (#RESET) is required.
Mfg_load
1 bVSCBSubCommand (must be 0x26)
2 Reserved (must be set to zero)
3 Data Source (must be set to 0x02)
4 Start Address (LSB) (must be set to zero)
5 Start Address (MSB) (must be set to zero)
6
–
15 Reserved (must be set to zero)
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
1
0
1
0
0
0
0
0
0
0
0
0
MfgCB Byte Description
Bits
0 bVSCBSignature (set in configuration bytes)
1 bVSCBSubCommand (hardcoded 0x27)
2
–
15 Reserved (must be zero)
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
1
1
0
0
1
0
0
1
0
Table 5-4. Mfg_load Data Format
Byte
0
0
0
0
0
1
1
1
1
1
2
3
4
5
6
Bit(s)
0
3:1
5:4
6
7
0
1
2
3:6
7
7:0
7:0
7:0
7:0
7:0
Test/Three-state Control Function
Reserved
DA[2:0]
CS#[1:0]
Reserved
ARESET#
NDIOW
NDIOR
NDMACK
Reserved
DD[15:0] Three-state (0 = three-state DD pins, 1 = enable DD pins).
DD[7:0]
DD[15:8]
Reserved
Reserved
Reserved
Table 5-2. Example CfgCB
(continued)
CfgCB Byte Descriptions
Bits
7
6
5
4
3
2
1
0
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|---|---|
| CY4615A | 功能描述:開發(fā)板和工具包 - 其他處理器 Development Board COM RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓: |
| CY4615B | 功能描述:界面開發(fā)工具 Reference Design Kit COM RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
| CY4616 | 制造商:Cypress Semiconductor 功能描述:HIGH SPEED USB TO ATA - Bulk |
| CY4617 | 功能描述:開發(fā)板和工具包 - 其他處理器 Development Board COM RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓: |
| CY4617-CF | 制造商:Cypress Semiconductor 功能描述:USB LS DEVELOPMENT KIT - Bulk |
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