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參數(shù)資料
| 型號： | CY28408 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | Clock Synthesizer with Differential CPU Outputs |
| 中文描述： | 時鐘合成器的差分輸出的CPU |
| 文件頁數(shù)： | 9/19頁 |
| 文件大?。?/td> | 212K |
| 代理商： | CY28408 |
CY28408
Document #: 38-07617 Rev. **
Page 9 of 19
CPU_STP# Deassertion
The deassertion of the CPU_STP# signal will cause all
CPUT/C outputs that were stopped to resume normal
operation in a synchronous manner. Synchronous manner
meaning that no short or stretched clock pulses will be
produces when the clock resumes. The maximum latency
from the deassertion to active outputs is no more than 2 CPUC
clock cycles.
Three-state Control of CPU Clocks Clarification
During CPU_STP# and PD# modes, CPU clock outputs may
be set to driven or undriven (three-state) by setting the corre-
sponding SMBus entry in Bit6 of Byte0 and Bit6 of Byte1.
CPU_STP#
CPUT
CPUC
CPUT
CPUC
Figure 3. CPU_STP# Assertion Waveform
CPU_STP#
CPUT
CPUC
CPUT
CPUC
Figure 4. CPU_STP# Deassertion Waveform
Table 9. Cypress Clock Power Management Truth Table
B0b6
0
0
0
0
0
0
0
0
1
1
1
1
B1b6
0
0
0
0
1
1
1
1
0
0
0
0
PD#
1
1
0
0
1
1
0
0
1
1
0
0
CPU_STP# Stoppable CPUT
1
0
1
0
1
0
1
0
1
0
1
0
Stoppable CPUC
Running
Iref x6
Low
Low
Running
Hi Z
Hi Z
Hi Z
Running
Iref x6
Hi Z
Hi Z
Non-Stop CPUT
Running
Running
Iref x2
Iref x2
Running
Running
Hi Z
Hi Z
Running
Running
Hi Z
Hi Z
Non-Stop CPUC
Running
Running
Low
Low
Running
Running
Hi Z
Hi Z
Running
Running
Hi Z
Hi Z
Running
Iref x6
Iref x2
Iref x2
Running
Hi Z
Hi Z
Hi Z
Running
Iref x6
Hi Z
Hi Z
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PDF描述 |
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| CY28408ZC | TV 19C 19#12 SKT RECP |
| CY28408ZCT | Circular Connector; MIL SPEC:MIL-DTL-38999 Series III; Body Material:Metal; Series:TVS01; Number of Contacts:3; Connector Shell Size:9; Connecting Termination:Crimp; Circular Shell Style:Straight Receptacle; Body Style:Straight |
| CY28409 | Clock Synthesizer with Differential SRC and CPU Outputs |
| CY28409ZCT | Clock Synthesizer with Differential SRC and CPU Outputs |
| CY28409OC | RF/Coaxial Connector; RF Coax Type:BNC; Contact Termination:Clamp; Body Style:Straight Plug; RG Cable Type:59, 62, 71, 140, 210, 302 RoHS Compliant: Yes |
相關代理商/技術參數(shù) |
參數(shù)描述 |
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| CY28408ZC | 制造商:Cypress Semiconductor 功能描述: |
| CY28408ZCT | 制造商:SPECTRALINEAR 制造商全稱:SPECTRALINEAR 功能描述:Clock Synthesizer with Differential CPU Outputs |
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| CY28409AZXC | 功能描述:時鐘發(fā)生器及支持產品 SysClk Intel Grntsdl 865 and 875 chipsets RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56 |
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