參數(shù)資料
型號(hào): CY28408
廠商: Cypress Semiconductor Corp.
英文描述: Clock Synthesizer with Differential CPU Outputs
中文描述: 時(shí)鐘合成器的差分輸出的CPU
文件頁數(shù): 17/19頁
文件大?。?/td> 212K
代理商: CY28408
CY28408
Document #: 38-07617 Rev. **
Page 17 of 19
For Single-Ended Output Signals
Buffer Characteristics
Current Mode CPU Clock Buffer Characteristics
The current mode output buffer detail and current reference
circuit details are contained in the previous table of this data
sheet. The following parameters are used to specify output
buffer characteristics:
1. Output impedance of the current mode buffer circuit – Ro
(see
Figure 14
).
2. Minimum and maximum required voltage operation range
of the circuit – Vop (see
Figure 14
).
3. Series resistance in the buffer circuit – Ros (see
Figure 14
).
4. Current accuracy at given configuration into nominal test
load for given configuration.
2.4V
0.4V
3.3V
0V
Tr
Tf
1.5V
3.3V signals
tDC
Probe
Output under Test
Load Cap
-
-
Figure 13.
1.2V
0V
Iout
Iout
Ros
Ro
VDD3 (3.3V +/- 5%)
Vout = 1.2V max
Vout
Slope ~ 1/R
0
Figure 14.
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