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參數(shù)資料
| 型號： | CY28408 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | Clock Synthesizer with Differential CPU Outputs |
| 中文描述： | 時鐘合成器的差分輸出的CPU |
| 文件頁數(shù)： | 7/19頁 |
| 文件大?。?/td> | 212K |
| 代理商： | CY28408 |
CY28408
Document #: 38-07617 Rev. **
Page 7 of 19
Dial-a-Frequency Feature
SMBus Dial-a-Frequency feature is available in this device via
Byte8 and Byte9. See our App Note AN-0025 for details on our
Dial-a-Frequency feature.
P is a large value PLL constant that depends on the frequency
selection achieved through the hardware selectors (S1, S0).
P value may be determined from
Table 6
.
Table 6. P Value
USB and DOT 48M Phase Relationship
The 48M_USB and 48M_DOT clocks are normally in phase. It
is understood that the difference in edge rate will introduce
some inherent offset. When 3V66_1/VCH clock is configured
for VCH (48-MHz) operation it is also in phase with the USB
and DOT outputs. See
Figure 1
.
Byte 7: Reserved
Bit
7
6
5
4
3
2
1
0
@Pup
0
0
0
0
1
1
1
0
Name
Description
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
N8, MSB
Byte 8: Dial-a-Frequency Control Register N
(all bits are read and write functional)
Bit
7
6
5
4
3
2
1
0
@Pup
0
0
0
0
0
0
0
0
Name
Description
N7
N6
N5
N4
N3
N2
N3
N0, LSB
Byte 9: Dial-a-Frequency Control Register R
(all bits are read and write functional)
Bit
7
6
5
4
3
2
1
0
@Pup
0
0
0
0
0
0
0
0
Name
Description
R6 MSB
R5
R4
R3
R2
R1
R0, LSB
R and N register mux selection. 0 = R and N values come from the ROM.
1 = data is loaded from DAF (SMBus) registers.
S(1:0)
0 0
0 1
1 0
1 1
P
32005333
48008000
96016000
64010667
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