- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379002 > CY22E016L (Cypress Semiconductor Corp.) 16-Kbit (2K x 8) nvSRAM PDF資料下載
參數(shù)資料
| 型號(hào)： | CY22E016L |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 16-Kbit (2K x 8) nvSRAM |
| 中文描述： | 16千位（2K × 8）非易失 |
| 文件頁(yè)數(shù)： | 8/14頁(yè) |
| 文件大小： | 748K |
| 代理商： | CY22E016L |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)當(dāng)前第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)
PRELIMINARY
CY22E016L
Document #: 001-06727 Rev. *C
Page 8 of 14
AC Switching Characteristics
Parameter
Cypress
Parameter
SRAM Read Cycle
t
ACE
t
RC [4]
t
AA [5]
t
DOE
t
OHA [5]
t
LZCE [6]
t
HZCE [6]
t
LZOE [6]
t
HZOE [6]
t
PU [3]
t
PD[ 3]
SRAM Write Cycle
t
WC
t
PWE
t
SCE
t
SD
t
HD
t
AW
t
SA
t
HA
t
HZWE [6,7]
t
LZWE [6]
Description
25ns part
35ns part
45ns part
Unit
Min.
Max.
Min.
Max.
Min.
Max.
Alt.
Parameter
t
ACS
t
RC
t
AA
t
OE
t
OH
t
LZ
t
HZ
t
OLZ
t
OHZ
t
PA
t
PS
Chip Enable Access Time
Read Cycle Time
Address Access Time
Output Enable to Data Valid
Output Hold After Address Change
Chip Enable to Output Active
Chip Disable to Output Inactive
Output Enable to Output Active
Output Disable to Output Inactive
Chip Enable to Power Active
Chip Disable to Power Standby
25
35
45
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
25
35
45
25
10
35
15
45
20
5
5
5
5
5
5
10
13
15
0
0
0
10
13
15
0
0
0
25
35
45
t
WC
t
WP
t
CW
t
DW
t
DH
t
AW
t
AS
t
WR
t
WZ
t
OW
Write Cycle Time
Write Pulse Width
Chip Enable To End of Write
Data Set-Up to End of Write
Data Hold After End of Write
Address Set-Up to End of Write
Address Set-Up to Start of Write
Address Hold After End of Write
Write Enable to Output Disable
Output Active after End of Write
25
20
20
10
0
20
0
0
35
25
25
12
0
25
0
0
45
30
30
15
0
30
0
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
10
13
14
5
5
5
AutoStore/Power-Up RECALL
Parameter
t
HRECALL [8]
t
STORE [9]
t
DELAY
V
SWITCH
V
RESET
Notes:
4. WE must be HIGH during SRAM Read Cycles.
5. Device is continuously selected with CE and OE both Low.
6. Measured ±200 mV from steady state output voltage.
7. If WE is Low when CE goes Low, the outputs remain in the high-impedance state.
8. t
starts from the time V
rises above V
9. If an SRAM Write has not taken place since the last non-volatile cycle, no STORE will take place.
Description
CY22E016L
Min.
Unit
μ
s
ms
μ
s
V
V
Max.
550
10
Power-Up RECALL Duration
STORE Cycle Duration
Time allowed to complete SRAM Cycle
Low Voltage Trigger Level
Low Voltage Reset Level
1
4.0
4.5
3.6
[+] Feedback
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY22E016L-SZ25XCT | 16-Kbit (2K x 8) nvSRAM |
| CY22E016L-SZ35XCT | 16-Kbit (2K x 8) nvSRAM |
| CY22E016L-SZ35XIT | 16-Kbit (2K x 8) nvSRAM |
| CY22E016L-SZ45XCT | 16-Kbit (2K x 8) nvSRAM |
| CY2313ANZSC-1 | 13 Output, 3.3V SDRAM Buffer for Desktop PCs with 3 DIMMs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY22E016L_07 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:16 Kbit (2K x 8) nvSRAM |
| CY22E016L-SZ25XC | 制造商:Cypress Semiconductor 功能描述: |
| CY22E016L-SZ25XCT | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:16 Kbit (2K x 8) nvSRAM |
| CY22E016L-SZ25XI | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:16 Kbit (2K x 8) nvSRAM |
| CY22E016L-SZ25XIT | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:16 Kbit (2K x 8) nvSRAM |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。