Reset Value = XX00 0XXXb(1) Note: 1. Reset value depends on the power s" />
參數(shù)資料
型號: AT85C51SND3B1-7FTUL
廠商: Atmel
文件頁數(shù): 40/119頁
文件大?。?/td> 0K
描述: IC DECODER/ENCODER DGTL 100CBGA
標準包裝: 90
類型: 音頻編碼器/解碼器
應(yīng)用: 移動電話,手機,視頻顯示器
電壓 - 電源,數(shù)字: 1.65 V ~ 3.6 V
安裝類型: 表面貼裝
封裝/外殼: 100-TFBGA
供應(yīng)商設(shè)備封裝: 100-CTBGA(9x9)
包裝: 托盤
27
AT85C51SND3B
7632D–MP3–01/07
Reset Value = XX00 0XXXb(1)
Note:
1. Reset value depends on the power supply presence and on the internal reset source.
Reset Value = 0000 0000b
6
HVDET
High Voltage Detect Flag
Set by hardware when 3V is detected on HVDD pin.
Cleared by hardware when 3V is not detected on HVDD pin.
5-3
-
Reserved
The value of these bits is always 0. Do not set these bits.
2
WDTRST
Watchdog Timer Reset Flag
Set by hardware when the watchdog timer has overflowed triggering and internal
reset.
Must be cleared by software at power-up.
1
EXTRST
External Reset Flag
Set by hardware when the external RST pin is asserted (warm reset).
Must be cleared by software at power-up.
0
PFDRST
Power Failure Detector Reset Flag
Set by hardware when the power voltage has been triggered outside its specified
value (cold reset).
Must be cleared by software at power-up.
Table 22. VBAT Register
VBAT (0.85h) – Battery Voltage Monitor Register
7
6
5
4
3
2
1
0
VBEN
VBERR
-
VB4
VB3
VB2
VB1
VB0
Bit
Number
Bit
Mnemonic Description
7
VBEN
Battery Monitor Enable Bit
Set to enable the battery monitoring.
Cleared by hardware at the end of conversion
6
VBERR
Battery Monitor Error Flag
Set by hardware when conversion is out of min/max values.
5
-
Reserved
The value read from this bit is always 0. Do not set this bit.
4-0
VB4:0
Battery Value
Refer to Table 18 for voltage value correspondence.
Bit
Number
Bit
Mnemonic Description
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