參數(shù)資料
型號(hào)： AT85C51SND3B1-7FTUL
廠商： Atmel
文件頁(yè)數(shù)： 102/119頁(yè)
文件大?。?/td> 0K
描述： IC DECODER/ENCODER DGTL 100CBGA
標(biāo)準(zhǔn)包裝： 90
類型： 音頻編碼器/解碼器
應(yīng)用： 移動(dòng)電話，手機(jī)，視頻顯示器
電壓 - 電源，數(shù)字： 1.65 V ~ 3.6 V
安裝類型： 表面貼裝
封裝/外殼： 100-TFBGA
供應(yīng)商設(shè)備封裝： 100-CTBGA（9x9）
包裝： 托盤
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83
AT85C51SND3B
7632D–MP3–01/07
Reset Value = 0000 0000b
3
DRDY0
Channel 0 Destination Ready Flag
Set by hardware when the destination peripheral of channel 0 is ready.
Cleared by hardware when the destination peripheral of channel 0 is not ready.
2
SRDY0
Channel 0 Source Ready Flag
Set by hardware when the source peripheral of channel 0 is ready.
Cleared by hardware when the source peripheral of channel 0 is not ready.
1
EOFI0
Channel 0 End Of Data Flow Interrupt Flag
Set by hardware at the end of a channel 0 data flow transfer.
Cleared by software by setting EOFIA0 in DFCCON. Can not be set by software.
0
DFBSY0
Channel 0 Busy Flag
Set by hardware when a transfer is on-going on channel 0.
Cleared by hardware when no transfer is on-going on channel 0.
Table 96. DFCCON Register
DFCCON (1.85h) – DFC Channel Control Register
7
6
5
4
3
2
1
0
DFABT1
EOFE1
EOFIA1
-
DFABT0
EOFE0
EOFIA0
-
Bit
Number
Bit
Mnemonic Description
7
DFABT1
Channel 1 Abort Control Bit
Set to trigger an abort on channel 1.
This bit is cleared by hardware.
6
EOFE1
Channel 1 End Of Data Flow Interrupt Enable Bit
Set to enable channel 1 EOF interrupt.
Clear to disable channel 1 EOF interrupt.
5
EOFIA1
Channel 1 End Of Flow Interrupt Acknowledge Bit
Set to acknowledge the channel 1 EOF interrupt (clear EOFI1 flag).
Clearing this bit has no effect.
The value read from this bit is always 0.
4
-
Reserved
The value read from this bit is always 0. Do not set this bit.
3
DFABT0
Channel 0 Abort Control Bit
Set to trigger an abort on channel 0.
This bit is cleared by hardware.
2
EOFE0
Channel 0 End Of Data Flow Interrupt Enable Bit
Set to enable channel 0 EOF interrupt.
Clear to disable channel 0 EOF interrupt.
1
EOFIA0
Channel 0 End Of Flow Interrupt Acknowledge Bit
Set to acknowledge the channel 0 EOF interrupt (clear EOFI0 flag).
Clearing this bit has no effect.
The value read from this bit is always 0.
0
-
Reserved
The value read from this bit is always 0. Do not set this bit.
Bit
Number
Bit
Mnemonic Description
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參數(shù)描述
AT85C51SND3B1N-DDV 功能描述:音頻 DSP Microcontroller RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube
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AT85C51SND3B1-RTTUL 功能描述:音頻 DSP MP3/WMA USB2.0 w/o DAC+DC/DC RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube
AT85C51SND3B2-RTTUL 功能描述:音頻 DSP Microcontroller RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube
AT85C51SND3BX 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:MP3 Microcontrollers
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