參數(shù)資料
型號: AT43USB320A-AC
廠商: ATMEL CORP
元件分類: 微控制器/微處理器
英文描述: Full-speed USB Microcontroller with an Embedded Hub
中文描述: 8-BIT, 12 MHz, RISC MICROCONTROLLER, PQFP100
封裝: 14 X 14 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, MS-026AED, LQFP-100
文件頁數(shù): 96/115頁
文件大?。?/td> 722K
代理商: AT43USB320A-AC
96
AT43USB320A
1443E–USB–4/04
Figure 22.
Port Power Management
Suspend and
Resume
The AT43USB320A enters suspend only when requested by the USB host through bus inac-
tivity for at least 3 ms. The USB hardware would detect this request, sets the GLB_SUSP bit of
SPRSR, Suspend/Resume Register, and interrupts the microcontroller if the interrupt is
enabled. The microcontroller should shut down any peripheral activity and enter the Power
Down mode by setting the SE and SM bits of MCUCR and then executes the SLEEP instruc-
tion. The USB hardware shuts off the oscillator and PLL.
Global Resume
Global resume is signaled by a J to K state change on Port0. The USB hardware enables the
oscillator/PLL, propagates the RESUME signaling, and sets the RSM bit of the SPRSR, which
generates an interrupt. The microcontroller starts executing where it left off and services the
interrupt. As part of the ISR, the firmware clears the GLB_SUSP bit.
Remote Wakeup
While the AT43USB320A is in global suspend, resume signaling is also possible through
remote wakeup if the remote wakeup feature is enabled. Remote wakeup is defined as a port
connect, port disconnect or resume signaling received at a downstream port or, in case of the
embedded function, through an external interrupt.
A remote wakeup initiated at a downstream port is similar in many respects to a global
resume. The USB hardware enables the oscillator/PLL, propagates the RESUME signaling,
and sets the RSM bit of the SPRSR which generates an interrupt. The microcontroller starts
executing where it left off and services the interrupt. As part of the ISR, the firmware clears the
GLB_SUSP bit.
A remote wakeup from the embedded function is initiated through INT0 or the external inter-
rupt, INT1, which enables the oscillator/PLL and the USB hardware. The USB hardware drives
RESUME signaling and sets the FRMWUP and RSM bits of SPRSR which generates an inter-
CTL
FLG
IN
OUT
SWITCH
AT43USB320A
GND
VCC
PWRN
OVCN
PORT2_POWER
PORT2_GND
PORT3_POWER
PORT3_GND
BUS_POWER
GND
PORT1_POWER
PORT1_GND
PORT4_POWER
PORT4_GND
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