參數資料
型號： AT43USB320A-AC
廠商： ATMEL CORP
元件分類： 微控制器/微處理器
英文描述： Full-speed USB Microcontroller with an Embedded Hub
中文描述： 8-BIT, 12 MHz, RISC MICROCONTROLLER, PQFP100
封裝： 14 X 14 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, MS-026AED, LQFP-100
文件頁數： 85/115頁
文件大小： 722K
代理商： AT43USB320A-AC
85
AT43USB320A
1443E–USB–4/04
Function Endpoint 1, 2 Control and Acknowledge Register – FCAR1, 2
Bit 7 – Reserved
This bit is reserved in the AT43USB320A and will read as zero.
Bit 6 – DATA END
When set to 1 by firmware, this bit indicate that the microcontroller has either placed the last
data packet in FIFO, or that the microcontroller has processed the last data packet it expects
from the Host.
Bit 5 – FORCE STALL
This bit is set by the microcontroller to indicate a stalled endpoint. The hardware will send a
STALL handshake as a response to the next IN or OUT token. The microcontroller sets this bit
if it wants to force a STALL. A STALL is send if the host continues to ask for data after the data
is exhausted.
Bit 4 – TX PACKET RDY: Transmit Packet Ready
When set by the firmware, this bit indicates that the microcontroller has loaded the FIFO with a
packet of data. This bit is cleared by the hardware after the USB Host acknowledges the
packet. For ISO endpoints, this bit is cleared unconditionally after the data is sent.
The microcontroller should write into the FIFO only if this bit is cleared. After it has completed
writing the data, it should set this bit. This data can be of zero length.
The hardware clears this bit after it receives an ACK. If the interrupt is enabled and if the TX
Complete bit is set, clearing the TX Packet Ready bit by the hardware causes an interrupt to
the microcontroller.
Bit 3 – STALL_SENT_ACK: Acknowledge Stall Sent Interrupt
Firmware sets this bit to clear STALL SENT, CSR bit 3. The 1 written in the CSRACK3 bit is
not actually stored and thus does not have to be cleared.
Bit 2 – Reserved
This bit is reserved in the AT43USB320A and will read as zero.
Bit 1 – RX_OUT_PACKET_ACK: Acknowledge RX OUT PACKET Interrupt
Firmware sets this bit to clear RX OUT PACKET, CSR bit1. The 1 written in the CSRACK1 bit
is not actually stored and thus does not have to be cleared.
Bit 0 – TX_COMPLETE_ACK: Acknowledge TX COMPLETE Interrupt
Firmware sets this bit to clear TX COMPLETE, CSR bit0. The 1 written in the CSRACK0 bit is
not actually stored and thus does not have to be cleared.
Bit
7
6
5
4
3
2
1
0
Function EP1 $1FA4
–
DATA
END
FORCE
STALL
TX PACKET
RDY
STALL_SENT-
ACK
–
RX_OUT_PACKET
_ACK
TX_COMPLETE
_ACK
FCAR1
Function EP2 $1FA3
–
DATA
END
FORCE
STALL
TX PACKET
RDY
STALL_SENT-
ACK
–
RX_OUT_PACKET
_ACK
TX_COMPLETE
-ACK
FCAR2
Read/Write
R
R/W
R/W
R/W
R/W
R
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0
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相關代理商/技術參數
參數描述
AT43USB321 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:Full-speed USB Hub/Function Microcontroller
AT43USB324AC 制造商:未知廠家 制造商全稱:未知廠家 功能描述:KEYBOARD CONTROLLER
AT43USB324YC 制造商:未知廠家 制造商全稱:未知廠家 功能描述:KEYBOARD CONTROLLER
AT43USB325 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:Missed Watchdog Timer Reset
AT43USB325_05 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:Multimedia USB Keyboard Controller with Embedded Hub
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