
Tables
xv
24593—Rev. 3.09—September 2003
AMD 64-Bit Technology
Tables
Table 1-1.
Table 1-2.
Table 2-1.
Table 3-1.
Table 3-2.
Table 3-3.
Table 3-4.
Table 3-5.
Table 3-6.
Table 3-7.
Table 3-8.
Table 3-9.
Table 3-10. Interrupts and Exceptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
Table 4-1.
MXCSR Register Reset Values. . . . . . . . . . . . . . . . . . . . . . . . . 142
Table 4-2.
Range of Values in 128-Bit Media Integer Data Types . . . . . 149
Table 4-3.
Saturation Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150
Table 4-4.
Range of Values in Normalized Floating-Point Data Types . 152
Table 4-5.
Example of Denormalization. . . . . . . . . . . . . . . . . . . . . . . . . . . 154
Table 4-6.
NaN Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156
Table 4-7.
Supported Floating-Point Encodings . . . . . . . . . . . . . . . . . . . . 157
Table 4-8.
Indefinite-Value Encodings. . . . . . . . . . . . . . . . . . . . . . . . . . . . 158
Table 4-9.
Types of Rounding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159
Table 4-10. Example PANDN Bit Values . . . . . . . . . . . . . . . . . . . . . . . . . . . 186
Table 4-11. SIMD Floating-Point Exception Flags . . . . . . . . . . . . . . . . . . . 212
Table 4-12. Invalid-Operation Exception (IE) Causes . . . . . . . . . . . . . . . . 214
Table 4-13. Priority of SIMD Floating-Point Exceptions . . . . . . . . . . . . . . 216
Table 4-14. SIMD Floating-Point Exception Masks . . . . . . . . . . . . . . . . . . 218
Table 4-15. Masked Responses to SIMD Floating-Point Exceptions. . . . . 219
Table 5-1.
Range of Values in 64-Bit Media Integer Data Types . . . . . . 242
Table 5-2.
Saturation Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 242
Table 5-3.
Range of Values in 64-Bit Media Floating-Point Data Types 244
Table 5-4.
64-Bit Floating-Point Exponent Ranges. . . . . . . . . . . . . . . . . . 244
Table 5-5.
Example PANDN Bit Values . . . . . . . . . . . . . . . . . . . . . . . . . . . 264
Table 5-6.
Mapping Between Internal and Software-Visible Tag Bits . . 278
Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Application Registers and Stack, by Operating Mode . . . . . . . . 4
Address-Size Prefixes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Implicit Uses of Legacy GPRs. . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Representable Values of General-Purpose Data Types . . . . . . 43
Operand-Size Overrides. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
rFLAGS for CMOV
cc
Instructions . . . . . . . . . . . . . . . . . . . . . . . 51
rFLAGS for SET
cc
Instructions. . . . . . . . . . . . . . . . . . . . . . . . . . 66
rFLAGS for J
cc
Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Legacy Instruction Prefixes . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Instructions that Implicitly Reference RSP in 64-Bit Mode . . 96
Near Branches in 64-Bit Mode. . . . . . . . . . . . . . . . . . . . . . . . . . 103