參數(shù)資料
型號： AM79C974
廠商： Advanced Micro Devices, Inc.
英文描述： PCnetTM-SCSI Combination Ethernet and SCSI Controller for PCI Systems
中文描述： PCnetTM -的SCSI結(jié)合以太網(wǎng)和SCSI控制器PCI系統(tǒng)
文件頁數(shù)： 66/153頁
文件大?。?/td> 838K
代理商： AM79C974
AMD
P R E L I M I N A R Y
66
Am79C974
EEPROM Microwire Access
The Am79C974 controller contains a built-in capability
for reading and writing to an external EEPROM. This
built-in capability consists of a Microwire interface for di-
rect connection to a Microwire compatible EEPROM, an
automatic EEPROM read feature, and a user-program-
mable register that allows direct access to the Microwire
interface pins.
Automatic EEPROM Read Operation
Shortly after the deassertion of the
RST
pin, the
Am79C974 controller will read the contents of the
EEPROM that is attached to the Microwire interface.
Because of this automatic-read capability of the
Am79C974 controller, an EEPROM can be used to pro-
gram many of the features of the Am79C974 controller
at power-up, allowing system-dependent configuration
information to be stored in the hardware, instead of in-
side of operatingcode.
If an EEPROM exists on the Microwire interface, the
Am79C974 controller will read the EEPROM contents at
the end of the H_RESET operation. The EEPROM con-
tents will be serially shifted into a temporary register and
then sent to various register locations on board the
Am79C974 controller. The host can access the PCI
Configuration Space during the EEPROM read opera-
tions. Access to the Am79C974 I/O resources, however,
is not possible during the EEPROM read operation. The
Am79C974 controller will terminate these I/O accesses
with the assertion of
DEVSEL
and
STOP
while
TRDY
is
not asserted, signaling to the initiator to retry the access
at a later time.
A checksum verification is performed on the data that is
read from the EEPROM. If the checksum verification of
the EEPROM data fails, then at the end of the EEPROM
read sequence, the Am79C974 controller will force all
EEPROM-programmable BCR registers back to their
H_RESET default values. The content of the APROM
locations (offsets 0h – Fh from the I/O base address),
however, will not be cleared. The 8-bit checksum for the
entire 36 bytes of the EEPROM should be FFh.
If no EEPROM is present at the time of the automatic
read operation, then the Am79C974 controller will rec-
ognize this condition and will abort the automatic read
operation and reset both the PREAD and PVALID bits in
BCR19. All EEPROM-programmable BCR registers will
be assigned their default values after H_RESET. The
content of the Address PROM locations (offsets 0h – Fh
from the I/O base address) will be undefined.
If the user wishes to modify any of the configuration bits
that are contained in the EEPROM, then the seven com-
mand, data and status bits of BCR19 can be used to
write to the EEPROM. After writing to the EEPROM, the
host should set the PREAD bit of BCR19. This action
forces a Am79C974 controller re-read of the EEPROM
so that the new EEPROM contents will be loaded into
the EEPROM-programmable registers on board the
Am79C974 controller. (The EEPROM-programmable
registers may also be reprogrammed directly, but only
information that is stored in the EEPROM will be pre-
served at system power-down.) When the PREAD bit of
BCR19 is set, it will cause the Am79C974 controller to
terminate further accesses to internal I/O resources with
the PCI retry cycle. Accesses to the PCI configuration
space is still possible.
EEPROM Auto-Detection
The Am79C974 controller uses the EESK/
LED1
pin to
determine if an EEPROM is present in the system. At all
rising CLK edges during the assertion of the
RST
pin,
the Am79C974 controller will sample the value of the
EESK/
LED1
pin. If the sampled value is a ONE, then the
Am79C974 controller assumes that an EEPROM is pre-
sent, and the EEPROM read operation begins shortly
after the
RST
pin is deasserted. If the sampled value of
EESK/
LED1
is a ZERO, then the Am79C974 controller
assumes that an external pulldown device is holding the
EESK/
LED1
pin low, and therefore, there is no
EEPROM in the system. Note that if the designer cre-
ates a system that contains an LED circuit on the
EESK/
LED1
pin but has no EEPROM present, then the
EEPROM auto-detection function will incorrectly con-
clude that an EEPROM is present in the system. How-
ever, this will not pose a problem for the Am79C974
controller, since it will recognize the lack of an EEPROM
at the end of the read operation, when the checksum
verification fails.
Systems Without an EEPROM
Some systems may be able to save the cost of an
EEPROM by storing the ISO 8802-3 (IEEE/ANSI 802.3)
station address and other configuration information
somewhere else in the system. There are several de-
sign choices:
If the LED1 is not needed in the system, then the sys-
tem designer may connect the EESK/
LED1
pin to a
resistive pulldown device. This will indicate to the
EEPROM auto-detection function that no EEPROM
is present.
If the LED1 function is needed in the system, then the
system designer will connect the EESK/
LED1
pin to
a resistive pullup device and the EEPROM auto-de-
tection function will incorrectly conclude that an
EEPROM is present in the system. However, this will
not pose a problem for the Am79C974 controller,
since it will recognize the lack of an EEPROM at the
end of the read operation, when the checksum verifi-
cation fails.
In either case, following the PCI configuration, addi-
tional information, including the ISO 8802-3 (IEEE/ANSI
802.3) station address, may be loaded into the
Am79C974 controller. Note that the IESRWE bit (bit 8 of
BCR2) must be set before the Am79C974 controller will
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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