參數(shù)資料
型號(hào): AM79C974
廠商: Advanced Micro Devices, Inc.
英文描述: PCnetTM-SCSI Combination Ethernet and SCSI Controller for PCI Systems
中文描述: PCnetTM -的SCSI結(jié)合以太網(wǎng)和SCSI控制器PCI系統(tǒng)
文件頁(yè)數(shù): 37/153頁(yè)
文件大?。?/td> 838K
代理商: AM79C974
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P R E L I M I N A R Y
AMD
37
Am79C974
Transaction Termination
Termination of a PCI transaction may be initiated by
either the master or the target. During termination, the
master remains in control to bring all PCI transactions to
an orderly and systematic conclusion regardless of what
caused the termination. All transactions are concluded
when
FRAME
and
IRDY
are both deasserted, indicating
an IDLE cycle.
Target Initiated Termination
When the Am79C974 controller is a bus master, the cy-
cles it produces on the PCI bus may be terminated by
the target in one of three different ways: Disconnect with
data transfer, disconnect without data transfer, and tar-
get abort.
Disconnect With Data Transfer
Figure 11 shows a disconnection in which one last data
transfer occurs after the target asserted
STOP
.
STOP
is
asserted on clock 4 to start the termination sequence.
Data is still transferred during this cycles, since both
IRDY
and
TRDY
are asserted. The Am79C974 control-
ler terminates the current transfer with the deassertion
of
FRAME
on clock 5 and then one clock cycle later with
the deassertion of
IRDY
. It finally releases the bus on
clock 6. The Am79C974 controller will re-request the
bus after 2 clock cycles, if it wants to transfer more data.
The starting address of the new transfer will be the ad-
dress of the next untransferred data.
18681A-15
FRAME
CLK
AD
IRDY
TRDY
C/
BE
DEVSEL
REQ
GNT
1
2
3
4
5
6
7
8
DATA
DATA
0000
0111
10
9
PAR
PAR
PAR
PAR
DEVSEL
is sampled by the Am79C974 controller.
STOP
0111
11
ADDRi
ADDRi
Figure 11. Disconnect with Data Transfer
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM79C974KC 制造商:Advanced Micro Devices 功能描述:
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AM79C975 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY