- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄366550 > AM79C973 (Advanced Micro Devices, Inc.) PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY PDF資料下載
參數(shù)資料
| 型號： | AM79C973 |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY |
| 中文描述： | PCnet⑩快速三單芯片10/100 Mbps的PCI以太網(wǎng)控制器集成PHY |
| 文件頁數(shù)： | 104/304頁 |
| 文件大?。?/td> | 2092K |
| 代理商： | AM79C973 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁當(dāng)前第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁第173頁第174頁第175頁第176頁第177頁第178頁第179頁第180頁第181頁第182頁第183頁第184頁第185頁第186頁第187頁第188頁第189頁第190頁第191頁第192頁第193頁第194頁第195頁第196頁第197頁第198頁第199頁第200頁第201頁第202頁第203頁第204頁第205頁第206頁第207頁第208頁第209頁第210頁第211頁第212頁第213頁第214頁第215頁第216頁第217頁第218頁第219頁第220頁第221頁第222頁第223頁第224頁第225頁第226頁第227頁第228頁第229頁第230頁第231頁第232頁第233頁第234頁第235頁第236頁第237頁第238頁第239頁第240頁第241頁第242頁第243頁第244頁第245頁第246頁第247頁第248頁第249頁第250頁第251頁第252頁第253頁第254頁第255頁第256頁第257頁第258頁第259頁第260頁第261頁第262頁第263頁第264頁第265頁第266頁第267頁第268頁第269頁第270頁第271頁第272頁第273頁第274頁第275頁第276頁第277頁第278頁第279頁第280頁第281頁第282頁第283頁第284頁第285頁第286頁第287頁第288頁第289頁第290頁第291頁第292頁第293頁第294頁第295頁第296頁第297頁第298頁第299頁第300頁第301頁第302頁第303頁第304頁
104
Am79C973/Am79C975
P R E L I M I N A R Y
the LCDET bit is set, the RWU pin will be asserted and
the PME_STATUS bit (PMCSR register, bit 15) will be
set. If either the PME_EN bit (PMCSR, bit 8) or the
PME_EN_OVR bit (CSR116, bit 10) are set, then the
PME will also be asserted.
OnNow Pattern Match Mode
In the OnNow Pattern Match Mode, the Am79C973/
Am79C975 device compares the incoming packets
with up to eight patterns stored in the Pattern Match
RAM (PMR). The stored patterns can be compared
with part or all of incoming packets, depending on the
pattern length and the way the PMR is programmed.
When a pattern match has been detected, then PMAT
bit (CSR116, bit 7) is set. The setting of the PMAT bit
causes the PME_STATUS bit (PMCSR, bit 15) to be
set, which in turn will assert the PME pin if the
PME_EN bit (PMCSR, bit 8) is set.
Pattern Match RAM (PMR)
PMR is organized as an array of 64 words by 40 bits as
shown in Figure 50. The PMR is programmed indirectly
through the BCRs 45, 46, and 47. When the BCR45 is
written and the PMAT_MODE bit (BCR45, bit 7) is set
to 1, Pattern Match logic is enabled. No bus accesses
into the PMR are possible when the PMAT_MODE bit
is set, and BCR46, BCR47, and all other bits in BCR45
are ignored. When PMAT_MODE is set, a read of
BCR45 returns all bits undefined except for
PMAT_MODE. In order to access the contents of the
PMR, PMAT_MODE bit should be programmed to 0.
When BCR45 is written to set the PMAT_MODE bit to
0, the Pattern Match logic is disabled and accesses to
the PMR are possible. Bits 6:0 of BCR45 specify the
address of the PMR word to be accessed. Writing to
BCR45 does not immediately affect the contents of the
PMR. Following the write to BCR45, the PMR word ad-
dressed by the bits 6:0 of the BCR45 may be read by
reading BCR45, BCR46, and BCR47 in any order. To
write to the PMR word, the write to BCR45 must be
followed by a write to BCR46 and a write to BCR47 in
that order to complete the operation. The PMR will not
actually be written until the write to BCR47 is complete.
The first two 40-bit words in this RAM serve as pointers
and contain enable bits for the eight possible match
patterns. The remainder of the RAM contains the
match patterns and associated match pattern control
bits. The byte 0 of the first word contains the Pattern
Enable bits. Any bit position set in this byte enables the
corresponding match pattern in the PMR, as an exam-
ple if the bit 3 is set, then the Pattern 3 is enabled for
matching. Bytes 1 to 4 in the first word are pointers to
the beginning of the patterns 0 to 3, and bytes 1 to 4 in
the second word are pointers to the beginning of the
patterns 4 to 7, respectively. Byte 0 of the second word
has no function associated with it. The byte 0 of the
words 2 to 63 is the Control Field of the PMR. Bit 7 of
this field is the End of Packet (EOP) bit. When this bit is
set, it indicates the end of a pattern in the PMR. Bits 6-
4 of the Control Field byte are the SKIP bits. The value
of the SKIP field indicates the number of the Dwords to
be skipped before the pattern in this PMR word is com-
pared with data from the incoming frame. A maximum
of seven Dwords may be skipped. Bits 3-0 of the Con-
trol Field byte are the MASK bits. These bits corre-
spond to the pattern match bytes 3-0 of the same PMR
word (PMR bytes 4-1). If bit
n
of this field is 0, then byte
n
of the corresponding pattern word is ignored. If this
field is programmed to 3, then bytes 0 and 1 of the pat-
tern match field (bytes 2 and 1 of the word) are used
and bytes 3 and 2 are ignored in the pattern matching
operation.
The contents of the PMR are not affected by
H_RESET, S_RESET, or STOP. The contents are un-
defined after a power up reset (POR).
Magic Packet Mode
In Magic Packet mode, the Am79C973/Am79C975
controller remains fully powered up (all VDD and VDDB
pins must remain at their supply levels). The device will
not generate any bus master transfers. No transmit op-
erations will be initiated on the network. The device will
continue to receive frames from the network, but all
frames will be automatically flushed from the receive
FIFO. Slave accesses to the Am79C973/Am79C975
controller are still possible. A Magic Packet is a frame
that is addressed to the Am79C973/Am79C975 con-
troller and contains a data sequence anywhere in its
data field made up of 16 consecutive copies of the de-
vice
’
s physical address (PADR[47:0]). The Am79C973/
Am79C975 controller will search incoming frames until
it finds a Magic Packet frame. It starts scanning for the
sequence after processing the length field of the frame.
The data sequence can begin anywhere in the data
field of the frame, but must be detected before the
Am79C973/Am79C975 controller reaches the frame
’
s
FCS field. Any deviation of the incoming frame
’
s data
sequence from the required physical address se-
quence, even by a single bit, will prevent the detection
of that frame as a Magic Packet frame.
The Am79C973/Am79C975 controller supports two dif-
ferent modes of address detection for a Magic Packet
frame. If MPPLBA (CSR5, bit 5) or EMPPLBA
(CSR116, bit 6) are at their default value of 0, the
Am79C973/Am79C975 controller will only detect a
Magic Packet frame if the destination address of the
packet matches the content of the physical address
register (PADR). If MPPLBA or EMPPLBA are set to 1,
the destination address of the Magic Packet frame can
be unicast, multicast, or broadcast.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM79C973KCW | PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY |
| AM79C975KCW | PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY |
| AM79C973VCW | PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY |
| AM79C975VCW | PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY |
| AM79C976 | PCnet-PRO⑩ 10/100 Mbps PCI Ethernet Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C973/75 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Board Layout Considerations for the Am79C973/75 Network Interface? - (PDF) |
| AM79C973/AM79C975 | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Am79C973/Am79C975 - PCnet-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY |
| AM79C973AVC\\W | 制造商:Advanced Micro Devices 功能描述: |
| AM79C973AVC\W | 制造商:Advanced Micro Devices 功能描述: |
| AM79C973BKC | 制造商:Advanced Micro Devices 功能描述:79C973BKC |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。