參數(shù)資料
型號(hào): AM79C970AKCW
廠商: ADVANCED MICRO DEVICES INC
元件分類(lèi): 微控制器/微處理器
英文描述: PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
中文描述: 2 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP132
封裝: PLASTIC, QFP-132
文件頁(yè)數(shù): 216/219頁(yè)
文件大?。?/td> 1065K
代理商: AM79C970AKCW
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)第172頁(yè)第173頁(yè)第174頁(yè)第175頁(yè)第176頁(yè)第177頁(yè)第178頁(yè)第179頁(yè)第180頁(yè)第181頁(yè)第182頁(yè)第183頁(yè)第184頁(yè)第185頁(yè)第186頁(yè)第187頁(yè)第188頁(yè)第189頁(yè)第190頁(yè)第191頁(yè)第192頁(yè)第193頁(yè)第194頁(yè)第195頁(yè)第196頁(yè)第197頁(yè)第198頁(yè)第199頁(yè)第200頁(yè)第201頁(yè)第202頁(yè)第203頁(yè)第204頁(yè)第205頁(yè)第206頁(yè)第207頁(yè)第208頁(yè)第209頁(yè)第210頁(yè)第211頁(yè)第212頁(yè)第213頁(yè)第214頁(yè)第215頁(yè)當(dāng)前第216頁(yè)第217頁(yè)第218頁(yè)第219頁(yè)
AMD
E-2
Am79C970A
I
Pin to disable external transceiver or DC-to-DC
converter. Polarity of assertion state
programmable.
LIST OF REGISTER BIT CHANGES
PCI Configuration Space
Command Register
I
ADSTEP (bit 7) now hardwired to ZERO. Was
hardwired to ONE.
I
MEMEN (bit 1) now read/write accessible. Was
hardwired to ZERO.
Status Register
I
PERR (bit 15) now cleared by H_RESET. Was not
effected by H_RESET.
I
SERR (bit 14) now cleared by H_RESET. Was not
effected by H_RESET.
I
RMABORT (bit 13) now cleared by H_RESET.
Was not effected by H_RESET.
I
RTABORT (bit 12) now cleared by H_RESET. Was
not effected by H_RESET.
I
STABORT (bit 11) now cleared by H_RESET. Was
not effected by H_RESET.
I
DATAPERR (bit 8) now cleared by H_RESET.
Was not effected by H_RESET.
I
FBTBC (bit 7) now hardwired to ONE. Was hard-
wired to ZERO.
Revision ID Register
I
This 8-bit register is now hardwired to 1xh. It was
hardwired to 0xh.
Latency Timer Register
I
This 8-bit register is now read/write accessible.
Was hardwired to ZERO.
I/O Base Address Register
I
IOBASE (bits 31–5) now cleared by H_RESET.
Was not effected by H_RESET.
Memory Mapped I/O Base Address Register
I
New 32-bit register. Was reserved, read as ZERO,
writes have no effect.
Expansion ROM Base Address Register
I
New 32-bit register. Was reserved, read as ZERO,
writes have no effect.
Interrupt Line Register
I
This 8-bit register is now cleared by H_RESET.
Was not effected by H_RESET.
MIN_GNT Register
I
New 8-bit register. Was reserved, read as ZERO,
writes have no effect.
MAX_LAT Register
I
New 8-bit register. Was reserved, read as ZERO,
writeshave no effect.
Control And Status Registers
CSR0: PCnet-PCI II controller Control and Status
Register
I
In addition to the existing interrupt flags, INTR (bit
7), the interrupt summary bit, is also affected by
the new interrupt flags Excessive Deferral Interrupt
(EXDINT), Magic Packet Interrupt (MPINT) Sleep
Interrupt (SLPINT), System Interrupt (SINT) and
User Interrupt (UINT).
CSR3: Interrupt Masks and Deferral
Control
I
New bit: DXSUFLO (bit 6), Disable Transmit Stop
on Underflow error. Was reserved location, read
and written as ZERO.
CSR4: Test and Features Control
I
New bit: UINTCMD (bit 7), User Interrupt Com-
mand. Was reserved location, read and written
as ZERO.
I
New bit: UINT (bit 6), User Interrupt. Was reserved
location, read as ZERO, written as ONE or ZERO.
CSR5:
I
New bit: TOKINTD (bit 15), Transmit OK Interrupt
Disable. Was reserved location, read and written
as ZERO.
I
New bit: LTINTEN (bit 14), Last Transmit Interrupt
Enable. Was reserved location, read and written as
ZERO.
I
New bit: SINT (bit 11), System Interrupt. Was re-
served location, read and written as ZERO.
I
New bit: SINTE (bit 10), System Interrupt Enable.
Was reserved location, read and written as ZERO.
I
New bit: SLPINT (bit 9), Sleep Interrupt. Was re-
served location, read and written as ZERO.
I
New bit: SLPINTE (bit 8), Sleep Interrupt Enable.
Was reserved location, read and written as ZERO.
I
New bit: EXDINT (bit 7), Excessive Deferral Inter-
rupt. Was reserved location, read and written as
ZERO.
I
New bit: EXDINTE (bit 6), Excessive Deferral Inter-
rupt Enable. Was reserved location, read and writ-
ten as ZERO.
I
New bit: MPPLBA (bit 5), Magic Packet Physical
Logical Broadcast Accept. Was reserved location,
read and written as ZERO.
I
New bit: MPINT (bit 4), Magic Packet Interrupt.
Was reserved location, read and written as ZERO.
I
New bit: MPINTE (bit 3), Magic Packet Interrupt
Enable. Was reserved location, read and written as
ZERO.
I
New bit: MPEN (bit 2), Magic Packet Enable. Was
reserved location, read and written as ZERO.
相關(guān)PDF資料
PDF描述
AM79C970AKC PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970A PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970AVCW PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970 PCnetTM-PCI Single-Chip Ethernet Controller for PCI Local Bus
AM79C971VCW PCnet⑩-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM79C970AVC 制造商:Advanced Micro Devices 功能描述:
AM79C970AVC\\W 制造商:Advanced Micro Devices 功能描述: 制造商:Rochester Electronics LLC 功能描述:
AM79C970AVC\W 制造商:Advanced Micro Devices 功能描述: 制造商:Rochester Electronics LLC 功能描述: 制造商:AMD 功能描述:
AM79C970AVC-G 制造商:Rochester Electronics LLC 功能描述:
AM79C970AVCW 制造商:AMD 制造商全稱(chēng):Advanced Micro Devices 功能描述:PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product