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參數(shù)資料
| 型號： | AM79C970AKC |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product |
| 中文描述： | 2 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP13 |
| 封裝： | CARRIER RING, PLASTIC, QFP-132 |
| 文件頁數(shù)： | 29/219頁 |
| 文件大?。?/td> | 1065K |
| 代理商： | AM79C970AKC |
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P R E L I M I N A R Y
AMD
29
Am79C970A
BASIC FUNCTIONS
System Bus Interface Function
The PCnet-PCI II controller is designed to operate as a
bus master during normal operations. Some slave I/O
accesses to the PCnet-PCI II controller are required in
normal operations as well. Initialization of the
PCnet-PCI II controller is achieved through a combina-
tion of PCI Configuration Space accesses, bus slave ac-
cesses, bus master accesses and an optional read of a
serial EEPROM that is performed by the PCnet-PCI II
controller. The EEPROM read operation is performed
through the Microwire interface. The ISO 8802-3
(IEEE/ANSI 802.3) Ethernet Address may reside within
the serial EEPROM. Some PCnet-PCI II controller con-
figuration registers may also be programmed by the
EEPROM read operation.
The Address PROM, on-chip bus-configuration regis-
ters, and the Ethernet controller registers occupy 32
bytes of address space. Both, I/O and memory mapped
I/O access are supported. Base Address registers in the
PCI configuration space allow locating the address
space on a wide variety of starting addresses.
For diskless stations, the PCnet-PCI II controller sup-
ports an Expansion ROM of up to 64 Kbytes in size. The
host can map the Expansion ROM to any memory ad-
dress that aligns to a 64K boundary by modifying the
Expansion ROM Base Address register in the PCI con-
figuration space.
Software Interface
The software interface to the PCnet-PCI II controller is
divided into three parts. One part is the PCI configura-
tion registers. They are used to identify the PCnet-PCI II
controller, and are also used to setup the configuration
of the device. The setup information includes the I/O or
memory mapped I/O base address, mapping of the
Expansion ROM and the routing of the PCnet-PCI II
controller interrupt channel. This allows for a
jumperless implementation.
The second portion of the software interface is the direct
access to the I/O resources of the PCnet-PCI II control-
ler. The PCnet-PCI II controller occupies 32 bytes of ad-
dress space that must begin on a 32-byte block
boundary. The address space can be mapped into both
I/O or memory space (memory mapped I/O). The I/O
Base Address Register in the PCI Configuration Space
defines the start address of the address space if it is
mapped to I/O space. The Memory Mapped I/O Base
Address Register defines the start address of the ad-
dress space if it is mapped to memory space. The
32-byte address space is used by the software to pro-
gram the PCnet-PCI II controller operating mode, en-
able and disable various features, monitor operating
status, and request particular functions to be executed
by the PCnet-PCI II controller.
The third portion of the software interface is the descrip-
tor and buffer areas that are shared between the soft-
ware and the PCnet-PCI II controller during normal
network operations. The descriptor area boundaries are
set by the software and do not change during normal
network operations. There is one descriptor area for re-
ceive activity and there is a separate area for transmit
activity. The descriptor space contains relocatable
pointers to the network frame data and it is used to trans-
fer frame status from the PCnet-PCI II controller to the
software. The buffer areas are locations that hold frame
data for transmission or that accept frame data that has
been received.
Network Interfaces
The PCnet-PCI II controller can be connected to an
802.3 network via one of three network interfaces. The
Attachment Unit Interface (AUI) provides an ISO 8802-3
(IEEE/ANSI 802.3) compliant differential interface to a
remote MAU or an on-board transceiver. The
10BASE-T interface provides a twisted-pair Ethernet
port. While in auto-selection mode, the interface in use
is determined by an auto-sensing mechanism which
checks the link status on the 10BASE-T port. If there is
no active link status, then the device assumes an AUI
connection. The General Purpose Serial Interface
(GPSI) allows bypassing the Manchester Encoder/De-
coder (MENDEC).
The PCnet-PCI II controller implements half or full-du-
plex Ethernet over all three network interfaces.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM79C970A | PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product |
| AM79C970AVCW | PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product |
| AM79C970 | PCnetTM-PCI Single-Chip Ethernet Controller for PCI Local Bus |
| AM79C971VCW | PCnet⑩-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus |
| AM79C971 | PCnet⑩-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C970AKC\\W | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Advanced Micro Devices 功能描述: |
| AM79C970AKC\W | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AM79C970AKCW | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product |
| AM79C970AVC | 制造商:Advanced Micro Devices 功能描述: |
| AM79C970AVC\\W | 制造商:Advanced Micro Devices 功能描述: 制造商:Rochester Electronics LLC 功能描述: |
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