P R E L I M I N A R Y
AMD
133
Am79C970A
Table 25. Software Styles
SWSTYLE
[7:0]
Style
Name
Initialization
Block Entries
Descriptor Ring
Entries
Altered Bit
Interpretations
CSRPCNET
SSIZE32
00h
C-LANCE
/
PCnet-ISA
1
0
16-bit software
structures, non-burst
or burst access
16-bit software
structures, non-burst
access only
All bits in CSR4
are used, TMD1[29]
is ADD_FCS
01h
ILACC
0
1
32-bit software
structures, non-burst
or burst access
32-bit software access
structures, non-burst
access only
CSR4[9:8],CSR4[5:4]
and CSR4[1:0] have
no function, TMD1[29]
is NO_FCS.
02h
PCnet-
PCI II
1
1
32-bit software
structures, non-burst
or burst access
32-bit software
structures, non-burst
access only
All bits in CSR4 are
used, TMD1[29] is
ADD_FCS
03h
PCnet-
PCI II
controller
1
1
32-bit software
structures, non-burst
or burst access
32-bit software
structures, non-burst
or burst access
All bits in CSR4 are
used, TMD1[29] is
ADD_FCS
All Other
Reserved
Undefined
Undefined
Undefined
Undefined
Undefined
CSR60: Previous Transmit Descriptor Address
Lower
Bit
Name
Description
31–16
RES
Reserved locations. Written as
ZEROs and read as undefined.
15–0
PXDAL
Contains the lower 16 bits of the
previous transmit descriptor ad-
dress pointer. The PCnet-PCI II
controller can stack multiple
transmit frames.
Read/Write
when either the STOP or the
SPND bit is set. These bits
are unaffected by H_RESET,
S_RESET or by setting the
STOP bit.
accessible
only
CSR61: Previous Transmit Descriptor Address
Upper
Bit
Name
Description
31–16
RES
Reserved locations. Written as
ZEROs and read as undefined.
15–0 PXDAU
Contains the upper 16 bits of the
previous transmit descriptor ad-
dress pointer. The PCnet-PCI II
controller can stack multiple
transmit frames.
Read/Write
when either the STOP or the
SPND bit is set. These bits
are unaffected by H_RESET,
S_RESET or by setting the
STOP bit.
accessible
only
CSR62: Previous Transmit Byte Count
Bit
Name
Description
31–16
RES
Reserved locations. Written as
ZEROs and read as undefined.
15–12
RES
Reserved locations.
11–0
PXBC
Previous Transmit Byte Count.
This field is a copy of the BCNT
field of TMD1 of the previous
transmit descriptor.
Read/Write
when either the STOP or the
SPND bit is set. These bits
are unaffected by H_RESET,
S_RESET or by setting the
STOP bit.
accessible
only
CSR63: Previous Transmit Status
Bit
Name
Description
31–16
RES
Reserved locations. Written as
ZEROs and read as undefined.
15–0
PXST
Previous Transmit Status. This
field is a copy of bits 31–16 of
TMD1 of the previous transmit
descriptor.
Read/Write
when either the STOP or the
SPND bit is set. These bits
are unaffected by H_RESET,
S_RESET or by setting the
STOP bit.
accessible
only