參數(shù)資料
型號(hào)： AM79C960KC
廠商： ADVANCED MICRO DEVICES INC
元件分類： 微控制器/微處理器
英文描述： PCnetTM-ISA Single-Chip Ethernet Controller
中文描述： 2 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP120
封裝： CARRIER RING, PLASTIC, QFP-120
文件頁數(shù)： 72/127頁
文件大?。?/td> 814K
代理商： AM79C960KC
P R E L I M I N A R Y
AMD
1-414
Am79C960
ENTST bit in CSR4 is set, all
writes to this register will auto-
matically perform a decrement
cycle.
When the Bus Activity Timer reg-
ister (CSR82: DMABAT) is
enabled, the PCnet-ISA control-
ler will relinquish the bus when
either the time specified in
DMABAT has elapsed or the
number of transfers specified in
DMABR have occured. When
ENTST (CSR4.15) is asserted,
all writes to this register will auto-
matically perform a decrement
cycle.
Read/write accessible only when
STOP bit is set.
CSR84-85: DMA Address
Bit
Name
Description
31-0
DMABA
DMA Address Register.
This register contains the ad-
dress of system memory for the
current DMA cycle. The Bus In-
terface Unit controls the Address
Register by issuing increment
commands to increment the
memory address for sequential
operations. The DMABA register
is undefined until the first
PCnet-ISA controller DMA op-
eration. When the ENTST bit in
CSR4 is set, all writes to this reg-
ister will automatically perform
an increment cycle.
This register has meaning only if
the PCnet-ISA controller is in Bus
Master Mode.
Read/write accessible only when
STOP bit is set.
CSR86: Buffer Byte Counter
Bit
Name
Description
15-12
RES
Reserved, Read and written with
ones.
DMA Byte Count Register. Con-
tains a Two’s complement of the
current size of the remaining
transmit or receive buffer in
bytes. This register is incre-
mented by the Bus Interface Unit.
The DMABC register is unde-
fined until written. When ENTST
11-0
DMABC
(CSR4.15) is asserted, all writes
to this register will automatically
perform an increment cycle.
Read/write accessible only when
STOP bit is set.
CSR88-89: Chip ID
Bit
Name
Description
31-28
Version. This 4-bit pattern is sili-
con revision dependent.
Part number. The 16-bit code for
the PCnet-ISA controller is
0000000000000011b.
Manufacturer ID. The 11-bit
manufacturer code for AMD is
00000000001b. This code is per
the JEDEC Publication 106-A.
Always a logic 1.
This register is exactly the same
as the Chip ID register in the
JTAG description.
27-12
11-1
0
CSR92: Ring Length Conversion
Bit
Name
Description
15-0
RCON
Ring Length Conversion Regis-
ter. This register performs a ring
length conversion from an en-
coded value as found in the
initialization block to a Two’s
complement value used for inter-
nal counting. By writing bits
15-12 with an encoded ring
length, a Two’s complemented
value is read. The RCON register
is undefined until written.
Read/write accessible only when
STOP bit is set.
CSR94:Transmit Time Domain Reflectometry
Count
Bit
Name
Description
15-10
RES
Reserved locations. Read and
written as zero.
Time Domain Reflectometry re-
flects the state of an internal
counter that counts from the start
of transmission to the occurrence
of loss of carrier. TDR is incre-
mented at a rate of 10 MHz.
Read accessible only when
STOP bit is set. Write operations
are ignored. XMTTDR is cleared
by RESET.
9-0
XMTTDR
相關(guān)PDF資料
PDF描述
AM79C960KCW PCnetTM-ISA Single-Chip Ethernet Controller
AM79C961AKCW PCnet ⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA
AM79C961AKC PCnet ⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA
AM79C961A PCnet ⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA
AM79C961AKIW PCnet⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM79C960KC/W 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Node Controller
AM79C960KCW 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnetTM-ISA Single-Chip Ethernet Controller
AM79C961 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Am79C961 - PCnet-ISA+ Jumperless Single-Chip Ethernet Controller for ISA
AM79C961/AM79C961A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Using the Am79C961/Am79C961A (PCnet-ISA+/PCnet-ISA II) Survival Guide? 134KB (PDF)
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