參數(shù)資料
型號(hào)： AM79C960KC
廠商： ADVANCED MICRO DEVICES INC
元件分類： 微控制器/微處理器
英文描述： PCnetTM-ISA Single-Chip Ethernet Controller
中文描述： 2 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP120
封裝： CARRIER RING, PLASTIC, QFP-120
文件頁(yè)數(shù)： 40/127頁(yè)
文件大?。?/td> 814K
代理商： AM79C960KC
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P R E L I M I N A R Y
AMD
1-382
Am79C960
MAC Engine will abort the transmission, append the jam
sequence, and set the LCOL bit. No retry attempt will be
scheduled on detection of a late collision, and the FIFO
will be flushed.
The IEEE 802.3 Standard requires use of a “truncated
binary exponential backoff” algorithm which provides a
controlled pseudo-random mechanism to enforce the
collision backoff interval, before re-transmission is
attempted.
See ANSI/IEEE Std 802.3-1990 Edition, 4.2.3.2.5:
“At the end of enforcing a collision (jamming),
the CSMA/CD sublayer delays before attempt-
ing to re-transmit the frame. The delay is an
integer multiple of slotTime. The number of slot
times to delay before the nth re-transmission
attempt is chosen as a uniformly distributed
random integer r in the range:
0
≤
r < 2
k
, where k = min (n,10).”
The PCnet-ISA controller provides an alternative algo-
rithm, which suspends the counting of the slot time/IPG
during the time that receive carrier sense is detected.
This algorithm aids in networks where large numbers of
nodes are present, and numerous nodes can be in
collision. The algorithm effectively accelerates the
increase in the backoff time in busy networks, and al-
lows nodes not involved in the collision to access the
channel while the colliding nodes await a reduction in
channel activity. Once channel activity is reduced, the
nodes resolving the collision time out their slot time
counters as normal.
Manchester Encoder/Decoder
(MENDEC)
The integrated Manchester Encoder/Decoder provides
the PLS (Physical Layer Signaling) functions required
for a fully compliant IEEE 802.3 station. The MENDEC
provides the encoding function for data to be transmitted
on the network using the high accuracy on-board oscil-
lator, driven by either the crystal oscillator or an external
CMOS-level compatible clock. The MENDEC also pro-
vides the decoding function from data received from the
network. The MENDEC contains a Power On Reset
(POR) circuit, which ensures that all analog portions of
the PCnet-ISA controller are forced into their correct
state during power-up, and prevents erroneous data
transmission and/or reception during this time.
External Crystal Characteristics
When using a crystal to drive the oscillator, the crystal
specification shown in the table may be used to ensure
less than
±
0.5 ns jitter at DO
±
.
Table : External Crystal Characteristics
1.Parallel Resonant
Frequency
20
MHz
2.Resonant Frequency Error
(CL = 20 pF)
–50
+50
PPM
3.Change in Resonant Frequency
With Respect To Temperature
(0
°
– 70
°
C; CL = 20 pF)*
4.Crystal Capacitance
–40
+40
PPM
20
pF
5.Motional Crystal
Capacitance (C1)
0.022
pF
pF
6.Series Resistance
25
7.Shunt Capacitance
7
8.Drive Level
TBD
mW
* Requires trimming crystal spec; no trim is 50 ppm total
Min
Nom
Max
Units
Parameter
External Clock Drive Characteristics
When driving the oscillator from an external clock
source, XTAL2 must be left floating (unconnected). An
external clock having the following characteristics must
be used to ensure less than
±
0.5 ns jitter at DO
±
:
Clock Frequency:
20 MHz
±
0.01%
< 6 ns from 0.5 V
to V
DD
–0.5
Rise/Fall Time (tR/tF):
XTAL1 HIGH/LOW Time
(tHIGH/tLOW):
20 ns min
XTAL1 Falling Edge to
Falling Edge Jitter:
<
±
0.2 ns at
2.5 V input (V
DD
/2)
MENDEC Transmit Path
The transmit section encodes separate clock and NRZ
data input signals into a standard Manchester encoded
serial bit stream. The transmit outputs (DO
±
) are de-
signed to operate into terminated transmission lines.
When operating into a 78
terminated transmission
line, the transmit signaling meets the required output
levels and skew for Cheapernet, Ethernet, and
IEEE-802.3.
相關(guān)PDF資料
PDF描述
AM79C960KCW PCnetTM-ISA Single-Chip Ethernet Controller
AM79C961AKCW PCnet ⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA
AM79C961AKC PCnet ⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA
AM79C961A PCnet ⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA
AM79C961AKIW PCnet⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM79C960KC/W 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Node Controller
AM79C960KCW 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnetTM-ISA Single-Chip Ethernet Controller
AM79C961 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Am79C961 - PCnet-ISA+ Jumperless Single-Chip Ethernet Controller for ISA
AM79C961/AM79C961A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Using the Am79C961/Am79C961A (PCnet-ISA+/PCnet-ISA II) Survival Guide? 134KB (PDF)
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