參數(shù)資料
型號: AM45DL32X8G
英文描述: 200NS, FLATPACK, 883C; LEV B COMPLIANT(EEPROM)
中文描述: Am45DL32x8G -堆疊式多芯片封裝(MCP)閃存和SRAM
文件頁數(shù): 55/64頁
文件大?。?/td> 1191K
代理商: AM45DL32X8G
54
Am45DL32x8G
August 28, 2002
P R E L I M I N A R Y
FLASH AC CHARACTERISTICS
t
GHEL
t
WS
OE#
CE#f
WE#
RESET#
t
DS
Data
t
AH
Addresses
t
DH
t
CP
DQ7#
D
OUT
t
WC
t
AS
t
CPH
PA
Data# Polling
A0 for program
55 for erase
t
RH
t
WHWH1 or 2
RY/BY#
t
WH
PD for program
30 for sector erase
10 for chip erase
555 for program
2AA for erase
PA for program
SADD for sector erase
555 for chip erase
t
BUSY
Notes:
1. Figure indicates last two bus cycles of a program or erase operation.
2. PA = program address, SADD = sector address, PD = program data.
3. DQ7# is the complement of the data written to the device. D
OUT
is the data written to the device.
4. Waveforms are for the word mode.
Figure 27.
Flash Alternate CE#f Controlled Write (Erase/Program) Operation Timings
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