參數(shù)資料
型號(hào)： ADV7183BKSTZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 81/100頁(yè)
文件大?。?/td> 0K
描述： IC VIDEO DECODER NTSC 80-LQFP
產(chǎn)品培訓(xùn)模塊： Interfacing AV Converters to Blackfin Processors
標(biāo)準(zhǔn)包裝： 1
類(lèi)型： 視頻解碼器
應(yīng)用： 投影儀，錄音機(jī)，安全
電壓 - 電源，模擬： 3.15 V ~ 3.45 V
電壓 - 電源，數(shù)字： 1.65 V ~ 2 V
安裝類(lèi)型： 表面貼裝
封裝/外殼： 80-LQFP
供應(yīng)商設(shè)備封裝： 80-LQFP（14x14）
包裝： 托盤(pán)
產(chǎn)品目錄頁(yè)面： 788 (CN2011-ZH PDF)
ADV7183B
Rev. B | Page 81 of 100
Bits
Subaddress
Register
Bit Description
7
6
5
4
3
2
1
0
Comments
Notes
Reserved
0
1
0
Set to default.
0
SFL compatible with
ADV7190/ADV7191/
ADV7194 encoders.
SFL_INV. Controls the behavior of
the PAL switch bit.
1
SFL compatible with
ADV717x/ADV7173x
encoders.
0x41
Resample
Control
Reserved
0
Set to default.
0x48
Gemstar
Control 1
GDECEL[15:8]. See the Comments
column.
0
0x49
Gemstar
Control 2
GDECEL[7:0]. See Comments
column.
0
GDECEL[15:0]. 16
individual enable bits that
select the lines of video
(even field Lines 10 to 25)
that the decoder checks
for Gemstar-compatible
data.
LSB = Line 10;
MSB = Line 25.
Default = Do not
check for Gemstar-
compatible data on
any lines[10 to 25] in
even fields.
0x4A
Gemstar
Control 3
GDECOL[15:8]. See the Comments
column.
0
0x4B
Gemstar
Control 4
GDECOL[7:0]. See Comments
column.
0
GDECOL[15:0]. 16
individual enable bits that
select the lines of video
(odd field lines 10 to 25)
that the decoder checks
for Gemstar-compatible
data.
LSB = Line 10;
MSB = Line 25.
Default = Do not
check for Gemstar-
compatible data on
any lines[10 to 25] in
odd fields.
0
Split data into half byte.
To avoid 00/FF code.
GDECAD. Controls the manner in
which decoded Gemstar data is
inserted into the horizontal blanking
period.
1
Output in straight 8-bit
format.
0x4C
Gemstar
Control 5
Reserved
x
Undefined.
0
Disable CTI.
CTI_EN. CTI enable.
1Enable CTI.
0
Disable CTI alpha blender.
CTI_AB_EN. Enables the mixing of
the transient improved chroma with
the original signal.
1
Enable CTI alpha blender.
0
Sharpest mixing.
0
1
Sharp mixing.
1
0
Smooth.
CTI_AB[1:0]. Controls the behavior
of the alpha-blend circuitry.
1
Smoothest.
Reserved
0
Set to default.
0
Bypass the DNR block.
DNR_EN. Enable or bypass the DNR
block.
1
Enable the DNR block.
0x4D
CTI DNR
Control 1
Reserved
1
Set to default.
0x4E
CTI DNR
Control 2
CTI_CTH[7:0]. Specifies how big the
amplitude step must be to be
steepened by the CTI block.
0
1
0
0x50
CTI DNR
Control 4
DNR_TH[7:0]. Specifies the
maximum edge that is interpreted
as noise and is therefore blanked.
0 0
0
1
0
Set to 0x04 for A/V input;
set to 0x0A for tuner
input.
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