參數(shù)資料
型號(hào): ADV7183BKSTZ
廠商: Analog Devices Inc
文件頁數(shù): 59/100頁
文件大?。?/td> 0K
描述: IC VIDEO DECODER NTSC 80-LQFP
產(chǎn)品培訓(xùn)模塊: Interfacing AV Converters to Blackfin Processors
標(biāo)準(zhǔn)包裝: 1
類型: 視頻解碼器
應(yīng)用: 投影儀,錄音機(jī),安全
電壓 - 電源,模擬: 3.15 V ~ 3.45 V
電壓 - 電源,數(shù)字: 1.65 V ~ 2 V
安裝類型: 表面貼裝
封裝/外殼: 80-LQFP
供應(yīng)商設(shè)備封裝: 80-LQFP(14x14)
包裝: 托盤
產(chǎn)品目錄頁面: 788 (CN2011-ZH PDF)
ADV7183B
Rev. B | Page 61 of 100
REGISTER ACCESSES
The MPU can write to or read from most of the ADV7183B’s
registers, except the registers that are read only or write only.
The subaddress register determines which register the next read
or write operation accesses. All communications with the part
through the bus start with an access to the subaddress register.
Next, a read/write operation is performed from/to the target
address, which then increments to the next address until a stop
command on the bus is performed.
REGISTER PROGRAMMING
This section describes the configuration of each register. The
communications register is an 8-bit, write only register. After
the part has been accessed over the bus and a read/write
operation is selected, the subaddress is set up. The subaddress
register determines to/from which register the operation takes
place.
263H
Table 82 lists the various operations under the control of
the subaddress register for the control port.
Register Select (SR7 to SR0)
These bits are set up to point to the required starting address.
I2C SEQUENCER
An I2C sequencer is used when a parameter exceeds eight bits
and is, therefore, distributed over two or more I2C registers,
such as HSB[11:0].
When such a parameter is changed using two or more I2C write
operations, the parameter can hold an invalid value for the time
between the first I2C completion and the last I2C completion.
This means, the top bits of the parameter can already hold the
new value while the remaining bits of the parameter still hold
the previous value.
To avoid this problem, the I2C sequencer holds the already
updated bits of the parameter in local memory; all bits of the
parameter are updated together once the last register write
operation has completed.
The correct operation of the I2C sequencer relies on the
following:
All I2C registers for the target parameter must be written to
in order of ascending addresses. For example, for
HSB[10:0], write to Address 0x34 first, followed by 0x35.
No other I2C can take place between the two (or more) I2C
writes for the sequence. For example, for HSB[10:0], write
to Address 0x34 first, immediately followed by 0x35.
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