參數(shù)資料
型號(hào): ADV7183BKSTZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 40/100頁(yè)
文件大?。?/td> 0K
描述: IC VIDEO DECODER NTSC 80-LQFP
產(chǎn)品培訓(xùn)模塊: Interfacing AV Converters to Blackfin Processors
標(biāo)準(zhǔn)包裝: 1
類(lèi)型: 視頻解碼器
應(yīng)用: 投影儀,錄音機(jī),安全
電壓 - 電源,模擬: 3.15 V ~ 3.45 V
電壓 - 電源,數(shù)字: 1.65 V ~ 2 V
安裝類(lèi)型: 表面貼裝
封裝/外殼: 80-LQFP
供應(yīng)商設(shè)備封裝: 80-LQFP(14x14)
包裝: 托盤(pán)
產(chǎn)品目錄頁(yè)面: 788 (CN2011-ZH PDF)
ADV7183B
Rev. B | Page 44 of 100
NFTOG[4:0] NTSC Field Toggle, Address 0xE7[4:0]
The default value of NFTOG is 00011, indicating the NTSC
Field toggle position.
For all NTSC/PAL Field timing controls, both the F bit in the
AV code and the Field signal on the FIELD pin are modified.
Table 57. Recommended User Settings for PAL (see
219H
Figure 27)
Register
Register Name
Write
0x31
Vsync Field Control 1
0x1A
0x32
Vsync Field Control 2
0x81
0x33
Vsync Field Control 3
0x84
0x34
Hsync Pos. Control 1
0x00
0x35
Hsync Pos. Control 2
0x00
0x36
Hsync Pos. Control 3
0x7D
0x37
Polarity
0x29
0xE8
PAL_V_Bit_Beg
0x41
0xE9
PAL_V_Bit_End
0x84
0xEA
PAL_F_Bit_Tog
0x06
FIELD 1
OUTPUT
VIDEO
H
V
F
622
623
624
625
1
2
3
4
5
6
7
8
9
10
22
23
24
PVBEG[4:0] = 0x5
PVEND[4:0] = 0x4
PFTOG[4:0] = 0x3
FIELD 2
OUTPUT
VIDEO
H
V
F
PVBEG[4:0] = 0x5
PVEND[4:0] = 0x4
PFTOG[4:0] = 0x3
310
311
312
313
314
315
316
317
318
319
320
321
322
335
336
337
04997
-026
Figure 26. PAL Default (BT.656). The Polarity of H, V, and F is Embedded in the Data.
FIELD 1
622
623
624
625
12
3
4
5
6
7
8
9
10
11
23
24
310
311
312
313
314
315
316
317
318
319
320
321
322
323
336
337
PVBEG[4:0] = 0x1
PVEND[4:0] = 0x4
PFTOG[4:0] = 0x6
FIELD 2
OUTPUT
VIDEO
FIELD
OUTPUT
HS
OUTPUT
VS
OUTPUT
VIDEO
FIELD
OUTPUT
HS
OUTPUT
VS
OUTPUT
PVBEG[4:0] = 0x1
PVEND[4:0] = 0x4
PFTOG[4:0] = 0x6
04997-
027
Figure 27. PAL Typical Vsync/Field Positions Using Register Writes in
220H
Table 57
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