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| 型號： | ADV7183BKSTZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 77/100頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC VIDEO DECODER NTSC 80-LQFP |
| 產(chǎn)品培訓(xùn)模塊： | Interfacing AV Converters to Blackfin Processors |
| 標準包裝： | 1 |
| 類型： | 視頻解碼器 |
| 應(yīng)用： | 投影儀，錄音機，安全 |
| 電壓 - 電源，模擬： | 3.15 V ~ 3.45 V |
| 電壓 - 電源，數(shù)字： | 1.65 V ~ 2 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 80-LQFP |
| 供應(yīng)商設(shè)備封裝： | 80-LQFP（14x14） |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁面： | 788 (CN2011-ZH PDF) |
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ADV7183B
Rev. B | Page 78 of 100
Bits
Subaddress
Register
Bit Description
7
6
5
4
3
2
1
0
Comments
Notes
CMG[11:8]. Chroma manual gain can
be used to program a desired
manual chroma gain. Reading back
from this register in AGC mode gives
the current gain.
0
1
0
CAGC[1:0] settings
decide in which mode
CMG[11:0] operates.
Reserved
1
Set to 1.
00
Slow (TC = 2 sec).
01
Medium (TC = 1 sec).
1
0
Fast (TC = 0.2 sec).
0x2D
Chroma
Gain
Control 1
CAGT[1:0]. Chroma automatic gain
timing allows adjustment of the
chroma AGC tracking speed.
1
Adaptive.
Has an effect only if
CAGC[1:0] is set to
auto gain (10).
0x2E
Chroma
Gain
Control 2
CMG[7:0]. Chroma manual gain
lower 8 bits. See CMG[11:8] for
description.
0
CMG[11:0] = 750d; gain is
1 in NTSC;
CMG[11:0] = 741d; gain is
1 in PAL.
Min value is 0d
(G = –60 dB)
Max value is 3750
(G = 5).
LMG[11:8]. Luma manual gain can
be used to program a desired
manual chroma gain or to read back
the actual gain value used.
x
LAGC[1:0] settings decide
in which mode LMG[11:0]
operates.
Reserved
1
Set to 1.
00
Slow (TC = 2 sec).
01
Medium (TC = 1 sec).
1
0
Fast (TC = 0.2 sec).
0x2F
Luma Gain
Control 1
LAGT[1:0]. Luma automatic gain
timing allows adjustment of the
luma AGC tracking speed.
1
Adaptive.
Has an effect only if
LAGC[1:0] is set to
auto gain (001, 010,
011,or 100).
0x30
Luma Gain
Control 2
LMG[7:0]. Luma manual gain can be
used to program a desired manual
chroma gain or read back the actual
used gain value.
x
LMG[11:0] = 1234 dec;
gain is 1 in NTSC.
LMG[11:0] = 1266d; gain
is 1 in PAL.
Min value:
NTSC 1024 (G = 0.85),
PAL (G = 0.81).
Max value:
NTSC 2468 (G = 2),
PAL = 2532 (G = 2).
0x31
Reserved
0
1
0
Set to default.
0
Start of line relative to HSE.
HSE = Hsync end.
HVSTIM. Selects where within a line
of video the VS signal is asserted.
1
Start of line relative to HSB.
HSB = Hsync begin.
0
EAV/SAV codes
generated to suit ADI
encoders.
NEWAVMODE. Sets the EAV/SAV
mode.
1
Manual VS/field position
controlled by Registers
0x32, 0x33, and 0xE5 to
0xEA.
VS and
FIELD
Control 1
Reserved
0
Set to default.
0x32
Reserved
0
1
Set to default.
VSBHE
0
VS goes high in the middle
of the line (even field).
1
VS changes state at the
start of the line (even field).
VSBHO
0
VS goes high in the middle
of the line (odd field).
Vsync
Field
Control 2
1
VS changes state at the
start of the line (odd field).
NEWAVMODE bit
must be set high.
0x33
Reserved
0
1
0
Set to default.
VSEHE
0
VS goes low in the middle
of the line (even field).
1
VS changes state at the
start of the line (even field).
VSEHO
0
VS goes low in the middle
of the line (odd field).
Vsync
Field
Control 3
1
VS changes state at the
start of the line odd field.
NEWAVMODE bit
must be set high.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7183KST | 制造商:Analog Devices 功能描述:Video Decoder 2ADC 10-Bit 80-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:VIDEO DECODER I.C. - Bulk |
| ADV7184 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat SDTV Video Decoder with Fast Switch Overlay Support |
| ADV7184BSTZ | 功能描述:IC DECODER VID SDTV MULTI 80LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標準包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
| ADV7185 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Professional NTSC/PAL Video Decoder with 10-Bit CCIR656 Output |
| ADV7185KST | 制造商:AD 制造商全稱:Analog Devices 功能描述:Professional NTSC/PAL Video Decoder with 10-Bit CCIR656 Output |
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