參數(shù)資料
型號: ADV7183BKSTZ
廠商: Analog Devices Inc
文件頁數(shù): 44/100頁
文件大?。?/td> 0K
描述: IC VIDEO DECODER NTSC 80-LQFP
產(chǎn)品培訓(xùn)模塊: Interfacing AV Converters to Blackfin Processors
標(biāo)準(zhǔn)包裝: 1
類型: 視頻解碼器
應(yīng)用: 投影儀,錄音機(jī),安全
電壓 - 電源,模擬: 3.15 V ~ 3.45 V
電壓 - 電源,數(shù)字: 1.65 V ~ 2 V
安裝類型: 表面貼裝
封裝/外殼: 80-LQFP
供應(yīng)商設(shè)備封裝: 80-LQFP(14x14)
包裝: 托盤
產(chǎn)品目錄頁面: 788 (CN2011-ZH PDF)
ADV7183B
Rev. B | Page 48 of 100
Wide Screen Signaling Data
WSS1[7:0], Address 0x91[7:0],
WSS2[7:0], Address 0x92[7:0]
221H
Figure 31 shows the bit correspondence between the analog
video waveform and the WSS1/WSS2 registers. WSS2[7:6] are
undetermined and should be masked out by software.
EDTV Data Registers
EDTV1[7:0], Address 0x93[7:0],
EDTV2[7:0], Address 0x94[7:0],
EDTV3[7:0], Address 0x95[7:0]
222H
Figure 32 shows the bit correspondence between the analog
video waveform and the EDTV1/EDTV2/EDTV3 registers.
EDTV3[7:6] are undetermined and should be masked out by
software. EDTV3[5] is reserved for future use and, for now,
contains 0. The 3 LSBs of the EDTV waveform are currently not
supported.
ACTIVE
VIDEO
WSS2[5:0]
WSS1[7:0]
RUN-IN
SEQUENCE
START
CODE
0
1
2
3
4
5
6
7
0
1
2
3
4
5
11.0
μs
38.4
μs
42.5
μs
04997-031
Figure 31. WSS Data Extraction
Table 58. WSS Access Information
Signal Name
Register Location
Address
Register Default Value
WSS1[7:0]
WSS 1[7:0]
145d
0x91
Readback Only
WSS2[5:0]
WSS 2[5:0]
146d
0x92
Readback Only
EDTV1[7:0]
EDTV2[7:0]
EDTV3[5:0]
NOT SUPPORTED
01
3
4
567
0
1
2 3 4
5
6
7
0
1
2
34
5
2
04997-032
Figure 32. EDTV Data Extraction
Table 59. EDTV Access Information
Signal Name
Register Location
Address
Register Default Value
EDTV1[7:0]
EDTV 1[7:0]
147d
0x93
Readback only
EDTV2[7:0]
EDTV 2[7:0]
148d
0x94
Readback only
EDTV3[7:0]
EDTV 3[7:0]
149d
0x95
Readback only
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