- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄375268 > ADV612 (Analog Devices, Inc.) Closed Circuit TV Digital Video Codec(閉路電視數(shù)字視頻編碼譯碼器) PDF資料下載
參數(shù)資料
| 型號： | ADV612 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 視頻Codec |
| 英文描述： | Closed Circuit TV Digital Video Codec(閉路電視數(shù)字視頻編碼譯碼器) |
| 中文描述： | 閉路電視數(shù)字視頻編解碼器（閉路電視數(shù)字視頻編碼譯碼器） |
| 文件頁數(shù)： | 19/48頁 |
| 文件大?。?/td> | 1085K |
| 代理商： | ADV612 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁當前第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁
ADV611/ADV612
–19–
REV. PrA
PRELMNARY
1
0
1
1
I
Host Word Enable pins. These two input pins select the words that the
ADV611/ADV612’s direct and indirect registers access through the Host Inter-
face;
BE0
–
BE1
access the least significant word, and
BE2
–
BE3
access the most
significant word. For a 32-bit interface only, tie these pins to ground, making
all words available.
Some important notes for 16-bit interfaces are as follows:
When using these byte enable pins, the byte order is always the lowest byte
to the higher bytes.
The ADV611/ADV612 advances to the next 32-bit compressed data FIFO
location after the
BE2
–
BE3
pin is asserted then de-asserted (when accessing the
Compressed Data register); so the FIFO location only advances when and if
the host reads or writes the MSW of a FIFO location.
The ADV611/ADV612 advances to the next 16-bit indirect register after the
BE0
–
BE1
pin is asserted then de-asserted; so the register selection only advances
when and if the host reads or writes the MSW of a 16-bit indirect register.
I
Host Chip Select. This pin operates as follows:
LO Qualifies Host Interface control signals
HI Three-states DATA[31:0] pins
I
Host Write. Host register writes occur on the rising edge of this signal.
I
Host Read. Host register reads occur on the low true level of this signal.
TECHNCAL
DRAM Interface Pins
Name
Pins
I/O
Description
DDAT[15:0]
16
I/O
DRAM Data Bus. The ADV611/ADV612 uses these pins for 16-bit data read/
write operations to the external 256K
×
16-bit DRAM. (The operation of the
DRAM interface is fully automatic and controlled by internal functionality
of the ADV611/ADV612.) These pins are compatible with 30 pF loads.
DRAM Address Bus. The ADV611/ADV612 uses these pins to form the multi-
plexed row/column address lines to the external DRAM. (The operation of the
DRAM interface is fully automatic and controlled by internal functionality
of the ADV611/ADV612.) These pins are compatible with 30 pF loads.
DRAM Row Address Strobe. This pin is compatible with 30 pF loads.
DRAM Column Address Strobe. This pin is compatible with 30 pF loads.
DRAM Write Enable. This pin is compatible with 30 pF loads.
Note that the ADV611/ADV612 does not have a DRAM
OE
pin. Tie the
DRAM’s
OE
pin to ground.
DADR[8:0]
9
O
RAS
CAS
WE
1
1
1
O
O
O
Host Interface Pins
Name
Pins
I/O
Description
DATA[31:0]
32
I/O
Host Data Bus. These pins make up a 32-bit wide host data bus. The host
controls this asynchronous bus with the
WR
,
RD
, BE, and
CS
pins to commu-
nicate with the ADV611/ADV612. These pins are compatible with 30 pF loads.
Host DWord Address Bus. These two address pins let you address the
ADV611/ADV612’s four directly addressable host interface registers. For an
illustration of how this addressing works, see the Control and Write Register
Map figure and Status and Read Register Map figure. The ADR bits permit
register addressing as follows:
ADR1
ADR0
DWord
Address Byte Address
0
0
0
0x00
0
1
1
0x04
2
0x08
3
0x0C
ADR[1:0]
2
I
BE0
–
BE3
2
CS
1
WR
RD
1
1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADV7129KS | 192-Bit, 360 MHz True-Color Video DAC with Onboard PLL |
| ADV7129 | 192-Bit, 360 MHz True-Color Video DAC with Onboard PLL(192位,360MHz,真彩色視頻D/A轉(zhuǎn)換器) |
| ADV7150LS85 | CMOS 220 MHz True-Color Graphics Triple 10-Bit Video RAM-DAC |
| ADV7150LS110 | CMOS 220 MHz True-Color Graphics Triple 10-Bit Video RAM-DAC |
| ADV7150LS135 | CMOS 220 MHz True-Color Graphics Triple 10-Bit Video RAM-DAC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV612BST | 制造商:Analog Devices 功能描述:Video Compression 120-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:INDUSTRIAL GRADE CCTV DIGITAL VID CODEC - Tape and Reel |
| ADV65056509 | 制造商:LG Corporation 功能描述:Frame Assembly |
| ADV65909302 | 制造商:LG Corporation 功能描述:Frame Assembly |
| ADV65909304 | 制造商:LG Corporation 功能描述:Frame Assembly |
| ADV66482002 | 制造商:LG Corporation 功能描述:Frame Assembly,Door |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。