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參數(shù)資料
型號(hào)： ADUC831BSZ-REEL
廠商： Analog Devices Inc
文件頁數(shù)： 44/76頁
文件大?。?/td> 0K
描述： IC MCU 62K FLASH ADC/DAC 52MQFP
標(biāo)準(zhǔn)包裝： 800
系列： MicroConverter® ADuC8xx
核心處理器： 8052
芯體尺寸： 8-位
速度： 16MHz
連通性： EBI/EMI，I²C，SPI，UART/USART
外圍設(shè)備： PSM，溫度傳感器，WDT
輸入/輸出數(shù)： 34
程序存儲(chǔ)器容量： 62KB（62K x 8）
程序存儲(chǔ)器類型： 閃存
EEPROM 大小： 4K x 8
RAM 容量： 2.25K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x12b，D/A 2x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 125°C
封裝/外殼： 52-QFP
包裝： 帶卷 (TR)
配用： EVAL-ADUC831QSZ-ND - KIT DEV FOR ADUC831 QUICK START
REV. 0
ADuC831
–49–
MCO
I2CM
SFR
BITS
50ns GLITCH
REJECTION FILTER
HARDWARE I2C
(SLAVE ONLY)
Q3
Q4
SCLOCK
PIN
Q2
Q1
(OFF)
DVDD
SPE = 0 (I2C ENABLE)
Figure 42. SCLOCK Pin I/O Functional Equivalent
in I 2C Mode
HARDWARE SPI
(MASTER/SLAVE)
Q3
Q1
Q2 (OFF)
DVDD
SDATA/
MOSI
PIN
Q4 (OFF)
SPE = 1 (SPI ENABLE)
Figure 43. SDATA/MOSI Pin I/O Functional Equivalent
in SPI Mode
Q3
Q4
Q2
Q1
(OFF)
DVDD
MDI
MDO
MDE
I2CM
HARDWARE I2C
(SLAVE ONLY)
50ns GLITCH
REJECTION FILTER
SDATA/
MOSI
PIN
SFR
BITS
SPE = 0 (I2C ENABLE)
Figure 44. SDATA/MOSI Pin I/O Functional Equivalent
in I 2C Mode
MISO is shared with P3.3 and as such has the same configuration
as shown in Figure 40.
Read-Modify-Write Instructions
Some 8051 instructions that read a port read the latch, and
others read the pin. The instructions that read the latch rather
than the pins are the ones that read a value, possibly change it,
and then rewrite it to the latch. These are called “read-modify-
write” instructions. Listed below are the read-modify-write
instructions. When the destination operand is a port, or a port
bit, these instructions read the latch rather than the pin.
ANL
(Logical AND, e.g., ANL P1, A)
ORL
(Logical OR, e.g., ORL P2, A)
XRL
(Logical EX-OR, e.g., XRL P3, A)
JBC
(Jump if Bit = 1 and Clear Bit, e.g., JBC P1.1,
LABEL)
CPL
(Complement Bit, e.g., CPL P3.0)
INC
(Increment, e.g., INC P2)
DEC
(Decrement, e.g., DEC P2)
DJNZ
(Decrement and Jump if Not Zero, e.g.,
DJNZ P3, LABEL)
MOV PX.Y, C
* (Move Carry to Bit Y of Port X)
CLR PX.Y
*
(Clear Bit Y of Port X)
SETB PX.Y
*
(Set Bit Y of Port X)
The reason that read-modify-write instructions are directed to the
latch rather than the pin is to avoid a possible misinterpretation of
the voltage level of a pin. For example, a port pin might be used to
drive the base of a transistor. When a 1 is written to the bit, the
transistor is turned on. If the CPU then reads the same port bit at
the pin rather than the latch, it will read the base voltage of the
transistor and interpret it as a logic 0. Reading the latch rather than
the pin will return the correct value of 1.
*These instructions read the port byte (all 8 bits), modify the addressed bit, and
then write the new byte back to the latch.
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