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參數(shù)資料
| 型號： | ADUC831BSZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 24/76頁 |
| 文件大小： | 0K |
| 描述： | IC MCU 62K FLASH ADC/DAC 52MQFP |
| 標準包裝： | 800 |
| 系列： | MicroConverter® ADuC8xx |
| 核心處理器： | 8052 |
| 芯體尺寸： | 8-位 |
| 速度： | 16MHz |
| 連通性： | EBI/EMI，I²C，SPI，UART/USART |
| 外圍設備： | PSM，溫度傳感器，WDT |
| 輸入/輸出數(shù)： | 34 |
| 程序存儲器容量： | 62KB（62K x 8） |
| 程序存儲器類型： | 閃存 |
| EEPROM 大小： | 4K x 8 |
| RAM 容量： | 2.25K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 8x12b，D/A 2x12b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 125°C |
| 封裝/外殼： | 52-QFP |
| 包裝： | 帶卷 (TR) |
| 配用： | EVAL-ADUC831QSZ-ND - KIT DEV FOR ADUC831 QUICK START |
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REV. 0
–30–
ADuC831
Example: Programming the Flash/EE Data Memory
A user wishes to program F3H into the second byte on Page
03H of the Flash/EE data memory space while preserving the
other three bytes already in this page.
A typical program of the Flash/EE Data array will involve:
1) setting EADRH/L with the page address
2) writing the data to be programmed to the EDATA1–4
3) writing the ECON SFR with the appropriate command
Step 1: Set Up the Page Address
The two address registers EADRH and EADRL hold the high
byte address and the low byte address of the page to be
addressed. The assembly language to set up the address may
appear as:
MOV EADRH,#0
;
Set Page Address Pointer
MOV EADRL,#03H
Step 2: Set Up the EDATA Registers
We must now write the four values to be written into the page
into the four SFRs EDATA–14. Unfortunately, we do not know
three of them. Thus, we must read the current page and over-
write the second byte.
MOV ECON,#1
; Read Page into EDATA1-4
MOV EDATA2,#0F3H
; Overwrite byte 2
Step 3: Program Page
A byte in the Flash/EE array can only be programmed if it has
previously been erased. To be more specific, a byte can only be
programmed if it already holds the value FFH. Because of the
Flash/EE architecture, this erase must happen at a page level;
therefore, a minimum of four bytes (one page) will be erased
when an erase command is initiated. Once the page is erased we
can program the four bytes in-page and then perform a verification
of the data.
MOV ECON,#5
; ERASE Page
MOV ECON,#2
; WRITE Page
MOV ECON,#4
; VERIFY Page
MOV A,ECON
; Check if ECON=0 (OK!)
JNZ ERROR
Although the 4 kBytes of Flash/EE data memory are shipped
from the factory pre-erased, i.e., byte locations set to FFH, it is
nonetheless good programming practice to include an erase-all
routine as part of any configuration/setup code running on the
ADuC831. An “ERASE-ALL” command consists of writing
“06H” to the ECON SFR, which initiates an erase of the
4 kByte Flash/EE array. This command coded in 8051 assembly
would appear as:
MOV ECON,#06H
; Erase all Command
; 2 ms Duration
Flash/EE Memory Timing
Typical program and erase times for the ADuC831 are as
follows:
NORMAL MODE (operating on Flash/EE data memory)
READPAGE (4 bytes)
– 5 machine cycles
WRITEPAGE (4 bytes)
– 380
s
VERIFYPAGE (4 bytes)
– 5 machine cycles
ERASEPAGE (4 bytes)
– 2 ms
ERASEALL (4 kBytes)
– 2 ms
READBYTE (1 byte)
– 3 machine cycle
WRITEBYTE (1 byte)
– 200
s
ULOAD MODE (operating on Flash/EE program memory)
WRITEPAGE (256 bytes)
– 15 ms
ERASEPAGE (64 bytes)
– 2 ms
ERASEALL (56 kBytes)
– 2 ms
WRITEBYTE (1 byte)
– 200
s
It should be noted that a given mode of operation is initiated as
soon as the command word is written to the ECON SFR. The
core microcontroller operation on the ADuC831 is idled until the
requested Program/Read or Erase mode is completed.
In practice, this means that even though the Flash/EE memory
mode of operation is typically initiated with a two-machine cycle
MOV instruction (to write to the ECON SFR), the next instruc-
tion will not be executed until the Flash/EE operation is complete.
This means that the core will not respond to interrupt requests
until the Flash/EE operation is complete, although the core
peripheral functions like counter/timers will continue to count
and time as configured throughout this period.
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