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ADuC7023
Data Sheet
| Page 66 of 96
Bit
Name
Description
1
I2CSTFE
I2C slave FIFO underflow status bit.
This bit goes high if the Tx FIFO is empty when a master requests data from the slave. This bit is asserted at
the rising edge of SCL during the read bit.
This bit is cleared in all other conditions.
0
I2CETSTA
I2C slave early transmit FIFO status bit.
If the I2CSETEN bit in I2CxSCON is = 0, this bit goes high if the slave Tx FIFO is empty. If the I2CSETEN bit in
I2CxSCON is = 1, this bit goes high just after the positive edge of SCL during the write bit transmission.
This bit asserts once only for a transfer.
This bit is cleared after being read.
I2C Slave Receive Registers, I2CxSRX
Name:
I2C0SRX, I2C1SRX
Address:
0xFFFF0830, 0xFFFF0930
Default value: 0x00
Access:
Read
Function:
These 8-bit MMRs are the I2C slave receive
register.
I2C Slave Transmit Registers, I2CxSTX
Name:
I2C0STX, I2C1STX
Address:
0xFFFF0834, 0xFFFF0934
Default value: 0x00
Access:
Write
Function:
These 8-bit MMRs are the I2C slave transmit
registers.
I2C Hardware General Call Recognition Registers,
I2CxALT
Name:
I2C0ALT, I2C1ALT
Address:
0xFFFF0838, 0xFFFF0938
Default value: 0x00
Access:
Read/write
Function:
These 8-bit MMRs are used with hardware
general calls when the I2CxSCON Bit 3 is set to 1.
These registers are used in cases where a master is
unable to generate an address for a slave, and
instead, the slave must generate the address for
the master.
I2C Slave Device ID Registers, I2CxIDx
Name:
I2C0IDx, I2C1IDx
Addresses:
0xFFFF093C = I2C1ID0
0xFFFF083C = I2C0ID0
0xFFFF0940 = I2C1ID1
0xFFFF0840 = I2C0ID1
0xFFFF0944 = I2C1ID2
0xFFFF0844 = I2C0ID2
0xFFFF0948 = I2C1ID3
0xFFFF0848 = I2C0ID3
Default value:
0x00
Access:
Read/write
Function:
These 8-bit MMRs are programmed with I2C
section for further details.
I2C Common Registers
I2C FIFO Status Registers, I2CxFSTA
Name:
I2C0FSTA, I2C1FSTA
Address:
0xFFFF084C, 0xFFFF094C
Default value: 0x0000
Access:
Read/write
Function:
These 16-bit MMRs contain the status of the
Rx/Tx FIFOs in both master and slave modes.
Rev. E