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參數(shù)資料
| 型號： | ADSP-TS203SABP-X |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | TigerSHARC Embedded Processor |
| 中文描述： | 32-BIT, OTHER DSP, PBGA576 |
| 封裝： | 25 X 25 MM, MS-034, EBGA-576 |
| 文件頁數(shù)： | 18/40頁 |
| 文件大?。?/td> | 609K |
| 代理商： | ADSP-TS203SABP-X |
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Rev. PrB
|
Page 18 of 40
|
December 2003
ADSP-TS203S
Preliminary Technical Data
Table 12. Pin definitions—Impedance Control , Drive Strength Control, and Regulator Enable
Signal
CONTROLIMP0
Type
I (pd)
Term
au
Description
Impedance Control. CONTROLIMP0 enables Pulse Mode. When CONTROLIMP0 = 0,
Pulse Mode is disabled and the output drive strength is continuously controlled by
DS2–0, both in the digital mode and in the analog mode (See analog and digital modes
below). When CONTROLIMP0 = 1, Pulse Mode is enabled. In Pulse Mode, whenever a
new value is driven to the output pin, drive strength is set to 100% for a short period of
1.5-2.5ns after rising edge of SCLK and afterwards it is set back to the value defined by
the resistance control DS2–0 pins as shown in
Table 13
.
Impedance Control. CONTROLIMP1 enables A/D mode of the control impedance
circuitry.When CONTROLIMP1 = 0, A/D mode is disabled, and output drive strength is
set relative to maximum drive strength according to table in DS2–0 explanation. When
CONTROLIMP1 = 1, A/D mode is enabled, and the resistance control operates in the
analog mode, where drive strength is continuously controlled to match a specific line
impedance as shown in
Table 13
.
Digital Drive Strength Selection. Selected as shown in
Table 13
. For drive strength calcu-
lation, see
Output Drive Currents on page 32
. The drive strength for some pins is preset,
not controlled by the DS2–0 pins. The pins that are always at drive strength 7 (100%)
include: CPA, DPA, TDO, EMU, and RST_OUT. The drive strength for the ACK pin is always
x2 drive strength 7 (100%).
Enable on-chip DRAM Regulator. Connect the ENEDREG pin to V
SS
. Connect the V
DD_DRAM
pins to a properly decoupled DRAM power supply.
CONTROLIMP1
I (pu)
au
DS2,0
DS1
I (pu)
I (pd)
au
ENEDREG
I (pu)
V
SS
I
= input;
A
= asynchronous;
O
= output;
OD
= open drain output;
T
= Three-State;
P
= power supply;
G
= ground;
pd
= internal pulldown 5 k
;
pu
= internal pullup 5 k
;
pd_0
= internal pulldown 5 k
on DSP ID=0;
pu_0
= internal pullup 5 k
on DSP
ID=0;
pu_od_0
= internal pullup 500
on DSP ID=0;
pd_m
= internal pulldown 5 k
on DSP bus master;
pu_m
= internal pullup 5 k
on DSP
bus master;
pu_ad
= internal pullup 40 k
; For more pulldown and pullup information, see
Electrical Characteristics on page 21
.
Term (for termination) column symbols:
epd = External pull-down approximately 5 k
to V
SS
; epu = External pull-up approximately 5 k
to V
DD_IO
, nc = Not connected; au = Always used.
Table 13. Drive Strength/Output Impedance Selection
DS2–0
Pins
000
001
010
011
100
101 (default)
110
111
Drive
Strength
1
Strength 0 (11.1%)
Strength 1 (23.8%)
Strength 2 (36.5%)
Strength 3 (49.2%)
Strength 4 (61.9%)
Strength 5 (74.6%)
Strength 6 (87.3%)
Strength 7 (100%)
Output
Impedance
2
26
32
40
50
62
70
96
120
1
CONTROLIMP1 = 0, A/D mode disabled.
2
CONTROLIMP1 = 1, A/D mode enabled.
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| ADSP-TS203SBBPZ050 | 制造商:Analog Devices 功能描述:DSP - Bulk |
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