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參數(shù)資料
| 型號(hào)： | ADSP-21060LC |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | DSP Microcomputer(DSP 微計(jì)算機(jī)) |
| 中文描述： | 微機(jī)的DSP（數(shù)字信號(hào)處理器微計(jì)算機(jī)） |
| 文件頁數(shù)： | 10/48頁 |
| 文件大?。?/td> | 515K |
| 代理商： | ADSP-21060LC |
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–10–
ADSP-21060C/ADSP-21060LC
REV. PrA
PRELIMINARY
T est Clock (JT AG)
. Provides an asynchronous clock for JT AG boundary scan.
T est Mode Select (JT AG)
. Used to control the test state machine. T MS has a 20 k
internal pull-up
resistor.
T est Data Input (JT AG)
. Provides serial data for the boundary scan logic. T DI has a 20 k
internal
pull-up resistor.
T est Data Output (JT AG)
. Serial scan output of the boundary scan path.
T est Reset (JT AG)
. Resets the test state machine.
TRST
must be asserted (pulsed low) after power-
up or held low for proper operation of the ADSP-2106x.
TRST
has a 20 k
internal pull-up resistor.
E mulation Status
. Must be connected to the ADSP-2106x EZ-ICE target board connector
only
.
Reserved
, leave unconnected.
Power Supply
; nominally +5.0 V dc for 5 V devices or +3.3 V dc for 3.3 V devices. (30 pins).
Power Supply Return
. (30 pins).
Do Not Connect
. Reserved pins which must be left open and unconnected.
TECHNICAL
power-up.
Pin
T ype
Function
T FSx
RFSx
LxDT A
3-0
I/O
I/O
I/O
T ransmit Frame Sync
(Serial Ports 0, 1).
Receive Frame Sync
(Serial Ports 0, 1).
Link Port Data
(Link Ports 0–5). Each LxCLK pin has a 50 k
internal pull-down resistor that is
enabled or disabled by the LPDRD bit of the LCOM register.
Link Port Clock
(Link Ports 0–5). Each LxCLK pin has a 50 k
internal pull-down resistor that is
enabled or disabled by the LPDRD bit of the LCOM register.
Link Port Acknowledge
(Link Ports 0–5). Each LxACK pin has a 50 k
internal pull-down resistor
that is enabled or disabled by the LPDRD bit of the LCOM register.
E PROM Boot Select
. When EBOOT is high, the ADSP-2106x is configured for booting from an 8-
bit EPROM. When EBOOT is low, the LBOOT and
BMS
inputs determine booting mode. See table
below. T his signal is a system configuration selection that should be hardwired.
L ink Boot
. When L BOOT is high, the ADSP-2106x is configured for link port booting. When
LBOOT is low, the ADSP-2106x is configured for host processor booting or no booting. See table
below. T his signal is a system configuration selection that should be hardwired.
LBOOT = 0). In a multiprocessor system,
BMS
is output by the bus master.
Input:
When low, indi-
cates that no booting will occur and that ADSP-2106x will begin executing instructions from external
memory. See table below. T his input is a system configuration selection that should be hardwired.
*T hree-statable only in EPROM boot mode (when
BMS
is an output).
EBOOT
LBOOT
BMS
Booting Mode
1
0
Output
EPROM (Connect
BMS
to EPROM chip select.)
0
0
1 (Input)
Host Processor
0
1
1 (Input)
Link Port
0
0
0 (Input)
No Booting. Processor executes from external memory.
0
1
0 (Input)
Reserved
1
1
x (Input)
Reserved
Clock In
. External clock input to the ADSP-2106x. T he instruction cycle rate is equal to CLK IN.
CLK IN may not be halted, changed, or operated below the minimum specified frequency.
Processor Reset
. Resets the ADSP-2106x to a known state and begins execution at the program
memory location specified by the hardware reset vector address. T his input must be asserted (low) at
LxCLK
I/O
LxACK
I/O
EBOOT
I
LBOOT
I
BMS
I/O/T *
CLK IN
I
RESET
I/A
T CK
T MS
I
I/S
T DI
I/S
T DO
TRST
O
I/A
EMU
(O/D)
ICSA
VDD
GND
NC
O
O
P
G
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| ADSP-21060LCB-133 | 功能描述:IC DSP CONTROLLER 32BIT 225BGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號(hào)處理器） 系列:SHARC® 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| ADSP-21060LCBZ-133 | 功能描述:IC DSP CONTROLLER 32BIT 225PBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號(hào)處理器） 系列:SHARC® 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| ADSP-21060LCW-133 | 制造商:Analog Devices 功能描述:DSP Floating-Point 32-Bit 33MHz 33MIPS 240-Pin CQFP 制造商:Rochester Electronics LLC 功能描述:SHARC IND.,3V,33MHZ CQFP HEAT SLUG DOWN - Bulk |
| ADSP-21060LCW-160 | 功能描述:IC DSP CONTROLLER 32BIT 240CQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號(hào)處理器） 系列:SHARC® 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| ADSP-21060LCWZ-133 | 制造商:Analog Devices 功能描述:SHARC INDUSTRIAL 5V CQFP HEAT SLUG UP - Trays |
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