參數(shù)資料
型號： ADSP-21060C
廠商： Analog Devices, Inc.
英文描述： DSP Microcomputer(DSP 微計算機)
中文描述： 微機的DSP（數(shù)字信號處理器微計算機）
文件頁數(shù)： 39/48頁
文件大小： 515K
代理商： ADSP-21060C
ADSP-21060C/ADSP-21060LC
–39–
REV. PrA
PRELIMINARY
DATA
TECHNICAL
T able III. E xternal Power Calculations (3.3 V Device)
Pin
T ype
# of
Pins
%
Switching
3
C
3
f
3
V
DD2
= P
E X T
Address
MS0
WR
Data
ADDRCLK
15
1
1
32
1
50
0
–
50
–
×
44.7 pF
×
44.7 pF
×
44.7 pF
×
14.7 pF
×
4.7 pF
×
10 MHz
×
10.9 V = 0.037 W
×
10 MHz
×
10.9 V = 0.000 W
×
20 MHz
×
10.9 V = 0.010 W
×
10 MHz
×
10.9 V = 0.026 W
×
20 MHz
×
10.9 V = 0.001 W
P
EX T
= 0.074 W
A typical power consumption can now be calculated for these
conditions by adding a typical internal power dissipation:
P
TOTAL
= P
EX T
+
(
I
DDIN2
×
5.0
V
)
Note that the conditions causing a worst-case P
EX T
are different
from those causing a worst-case P
INT
. Maximum P
INT
cannot
occur while 100% of the output pins are switching from all ones
to all zeros. Note also that it is not common for an application to
have 100% or even 50% of the outputs switching simultaneously.
T E ST CONDIT IONS
Output Disable T ime
Output pins are considered to be disabled when they stop driv-
ing, go into a high impedance state, and start to decay from
their output high or low voltage. T he time for the voltage on the
bus to decay by
V is dependent on the capacitive load, C
L
and
the load current, I
L
. T his decay time can be approximated by
the following equation:
t
DECAY
=
C
L
V
I
L
T he output disable time t
DIS
is the difference between t
MEASURED
and t
DECAY
as shown in Figure 25. T he time t
MEASURED
is the
interval from when the reference signal switches to when the
output voltage decays
V from the measured output high or
output low voltage. t
DECAY
is calculated with test loads C
L
and
I
L
, and with
V equal to 0.5 V.
Output E nable T ime
Output pins are considered to be enabled when they have made
a transition from a high impedance state to when they start
driving. T he output enable time t
ENA
is the interval from when a
reference signal reaches a high or low voltage level to when the
output has reached a specified high or low trip point, as shown
in the Output Enable/Disable diagram (Figure 25). If multiple
pins (such as the data bus) are enabled, the measurement value
is that of the first pin to start driving.
OUT PUT DRIVE CURRE NT S
Figure 28 shows typical I-V characteristics for the output drivers
of the ADSP-2106x. T he curves represent the current drive
capability of the output drivers as a function of output voltage.
POWE R DISSIPAT ION
T otal power dissipation has two components, one due to inter-
nal circuitry and one due to the switching of external output
drivers. Internal power dissipation is dependent on the instruc-
tion execution sequence and the data operands involved. Inter-
nal power dissipation is calculated in the following way:
P
INT
= I
DDIN
×
V
DD
T he external component of total power dissipation is caused by
the switching of output pins. Its magnitude depends on:
– the number of output pins that switch during each cycle (O)
– the maximum frequency at which they can switch (f)
– their load capacitance (C)
– their voltage swing (V
)
and is calculated by:
P
EX T
= O
×
C
×
V
DD
2
×
f
T he load capacitance should include the processor’s package
capacitance (C
IN
). T he switching frequency includes driving the
load high and then back low. Address and data pins can drive
high and low at a maximum rate of 1/(2t
CK
). T he write strobe
can switch every cycle at a frequency of 1/t
CK
. Select pins switch
at 1/(2t
CK
), but selects can switch on each cycle.
Example:
Estimate P
EX T
with the following assumptions:
–A system with one bank of external data memory RAM (32-bit)
–Four 128K
×
8 RAM chips are used, each with a load of 10 pF
–External data memory writes occur every other cycle, a rate
of 1/(4t
CK
), with 50% of the pins switching
–T he instruction cycle rate is 40 MHz (t
CK
= 25 ns).
T he P
EX T
equation is calculated for each class of pins that can
drive:
T able II. E xternal Power Calculations (5 V Device)
Pin
T ype
# of
Pins
%
Switching
3
C
3
f
3
V
DD2
= P
E X T
Address
MS0
WR
Data
ADDRCLK
15
1
1
32
1
50
0
–
50
–
×
44.7 pF
×
44.7 pF
×
44.7 pF
×
14.7 pF
×
4.7 pF
×
10 MHz
×
25 V
×
10 MHz
×
25 V
×
20 MHz
×
25 V
×
10 MHz
×
25 V
×
20 MHz
×
25 V
= 0.084 W
= 0.000 W
= 0.022 W
= 0.059 W
= 0.002 W
P
EX T
= 0.167 W
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