參數資料
型號: ADAU1966WBSTZRL
廠商: Analog Devices Inc
文件頁數: 14/52頁
文件大?。?/td> 0K
描述: IC DAC 24BIT DIFF 80LQFP
標準包裝: 1,000
位數: 24
數據接口: I²C,串行,SPI?
轉換器數目: 16
電壓電源: 模擬和數字
功率耗散(最大): 511mW
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 80-LQFP
供應商設備封裝: 80-LQFP(14x14)
包裝: 帶卷 (TR)
輸出數目和類型: 16 電壓,單極
采樣率(每秒): *
Data Sheet
ADAU1966
Rev. D | Page 21 of 52
mode. In one-shot mode, writing a 0 followed by writing a 1 to
Bit 4, THRM_GO, results in a single reset and temperature
conversion, placing the resulting temperature data in the
THRM_TEMP_STAT register. In continuous operation mode,
the data conversion takes place at a rate set by Bits[7:6], THRM_
RATE, with a range of 0.5 sec to 4 sec between samples. Faster
rates are possible using the one-shot mode.
Once a temperature conversion is placed in the
THRM_TEMP_STAT register, the data can be translated into
degrees Celsius (°C) using the following steps:
1. Convert the binary or hexadecimal data read from
THRM_TEMP_STAT into decimal form.
2. Subtract 60 from the converted THRM_TEMP_STAT data;
this is the temperature of the silicon in °C.
DLRCLK
BCLK
DSDATAx
DLRCLK
DBCLK
DSDATAx
DLRCLK
DBCLK
DSDATAx
LSB
LEFT CHANNEL
RIGHT CHANNEL
LEFT CHANNEL
RIGHT CHANNEL
MSB
RIGHT-JUSTIFIED MODE—SELECT NUMBER OF BITS PER CHANNEL: SAI = 0, SDATA_FMT = 2 OR 3
TDM MODE—16 BITS TO 24 BITS PER CHANNEL: SAI = 1, 2, 3, OR 4
I2S-JUSTIFIED MODE—16 BITS TO 24 BITS PER CHANNEL: SAI = 0, SDATA_FMT = 0
LEFT-JUSTIFIED MODE—16 BITS TO 24 BITS PER CHANNEL: SAI = 0, SDATA_FMT = 1
DLRCLK
DBCLK
DSDATAx
LSB
MSB
1/
fS
09434-
1
18
Figure 18. Stereo and TDM Serial Audio Modes
DBCLK
DLRCLK
DSDATAx
LEFT-JUSTIFIED
MODE
DSDATAx
RIGHT-JUSTIFIED
MODE
DSDATAx
I2S-JUSTIFIED
MODE
tDLH
tDBH
tDBL
tDLS
tDDS
MSB
LSB
MSB – 1
tDDH
tDDS
tDDH
tDDS
tDDH
tDDS
09434-
016
Figure 19. DAC Serial Timing
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